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authorScott Wood <scottwood@freescale.com>2012-10-02 19:35:18 -0500
committerScott Wood <scottwood@freescale.com>2012-11-26 15:41:26 -0600
commitd674bccf738396ecdc4374f5b5cb3e7fd376a0ab (patch)
tree889863e035aad4c90bf41b79c537be30e86dcefb /board/freescale
parenta796e72c78beb0bc29bbf068962b546639a099cd (diff)
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powerpc/mpc85xx/p1_p2_rdb_pc: clean up memory map
- Sort by address, and fix column alignment - Don't label things as localbus that aren't. Instead, put chipselect info at the end of the description for localbus windows. Note that NAND/NOR have their chipselects swapped when booting from NAND, and CS2 can be either PMC or VSC7385 depending on hwconfig. - Shrink NAND to the 32K that's actually mapped in the localbus - Assign an address and size to L2 SRAM. Remove the similarly named but unintelligible "L2 SDRAM(REV.)". - Remove the untrue comment about L1 stack being mapped with TLB0. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/p1_p2_rdb_pc/law.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 0da8300..cb5e7b7 100644
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -32,7 +32,7 @@ struct law_entry law_table[] = {
#endif
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
#ifdef CONFIG_SYS_NAND_BASE_PHYS
- SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC),
#endif
};