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| author | Tom Rini <trini@konsulko.com> | 2016-01-08 10:18:18 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-01-08 10:18:18 -0500 |
| commit | b685c7348c521b14591a49ec6b78a2ad28a176e0 (patch) | |
| tree | c2f85f890fd93241dbc36c5ff73106a49e587484 /board/freescale | |
| parent | 7ba34ff09f1ef105521f914e4ad4e4ac19975bac (diff) | |
| parent | 587c3f8ebe356b558f1876414885c1b4a31294ab (diff) | |
| download | u-boot-imx-b685c7348c521b14591a49ec6b78a2ad28a176e0.zip u-boot-imx-b685c7348c521b14591a49ec6b78a2ad28a176e0.tar.gz u-boot-imx-b685c7348c521b14591a49ec6b78a2ad28a176e0.tar.bz2 | |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/common/pfuze.c | 3 | ||||
| -rw-r--r-- | board/freescale/mx6sabresd/mx6sabresd.c | 36 |
2 files changed, 4 insertions, 35 deletions
diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c index 783c46d..69afa83 100644 --- a/board/freescale/common/pfuze.c +++ b/board/freescale/common/pfuze.c @@ -13,7 +13,8 @@ int pfuze_mode_init(struct pmic *p, u32 mode) { unsigned char offset, i, switch_num; - u32 id, ret; + u32 id; + int ret; pmic_reg_read(p, PFUZE100_DEVICEID, &id); id = id & 0xf; diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 581c9d5..d20953d 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -94,8 +94,9 @@ static void setup_iomux_enet(void) /* Reset AR8031 PHY */ gpio_direction_output(IMX_GPIO_NR(1, 25) , 0); - udelay(500); + mdelay(10); gpio_set_value(IMX_GPIO_NR(1, 25), 1); + udelay(100); } static iomux_v3_cfg_t const usdhc2_pads[] = { @@ -340,39 +341,6 @@ int board_mmc_init(bd_t *bis) } #endif -int mx6_rgmii_rework(struct phy_device *phydev) -{ - unsigned short val; - - /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); - - val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); - val &= 0xffe3; - val |= 0x18; - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); - - /* introduce tx clock delay */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); - val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); - val |= 0x0100; - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - mx6_rgmii_rework(phydev); - - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - #if defined(CONFIG_VIDEO_IPUV3) static void disable_lvds(struct display_info_t const *dev) { |