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| author | Gong Qianyu <Qianyu.Gong@freescale.com> | 2015-12-31 18:29:02 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-01-25 08:24:15 -0800 |
| commit | 98d9aa4013d9ad4df199297e79d955f55bd6eead (patch) | |
| tree | 17e1a81ddba580e9988c28c64276219cce741772 /board/freescale | |
| parent | 58e4ad1deee26425a6e0623481a0ced6a0c2db4e (diff) | |
| download | u-boot-imx-98d9aa4013d9ad4df199297e79d955f55bd6eead.zip u-boot-imx-98d9aa4013d9ad4df199297e79d955f55bd6eead.tar.gz u-boot-imx-98d9aa4013d9ad4df199297e79d955f55bd6eead.tar.bz2 | |
freescale/qixis: Add support for booting from SD/QSPI
1.Use "qixis_reset sd" to boot from SD
2.Use "qixis_reset sd_qspi" to boot from SD with QSPI support
3.Use "qixis_reset qspi" to boot from QSPI flash
On some SoCs such as LS1021A and LS1043A, IFC and QSPI could be
pin-multiplexed. So the switches are different between SD boot with
IFC support and SD boot with QSPI support. The default booting from
SD is with IFC support.
Once QSPI is enabled(IFC disabled), only use I2C to access QIXIS.
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/common/qixis.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c index 9f6b0e7..113295f 100644 --- a/board/freescale/common/qixis.c +++ b/board/freescale/common/qixis.c @@ -216,6 +216,39 @@ int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #else printf("Not implemented\n"); #endif + } else if (strcmp(argv[1], "sd") == 0) { +#ifdef QIXIS_LBMAP_SD + QIXIS_WRITE(rst_ctl, 0x30); + QIXIS_WRITE(rcfg_ctl, 0); + set_lbmap(QIXIS_LBMAP_SD); + set_rcw_src(QIXIS_RCW_SRC_SD); + QIXIS_WRITE(rcfg_ctl, 0x20); + QIXIS_WRITE(rcfg_ctl, 0x21); +#else + printf("Not implemented\n"); +#endif + } else if (strcmp(argv[1], "sd_qspi") == 0) { +#ifdef QIXIS_LBMAP_SD_QSPI + QIXIS_WRITE(rst_ctl, 0x30); + QIXIS_WRITE(rcfg_ctl, 0); + set_lbmap(QIXIS_LBMAP_SD_QSPI); + set_rcw_src(QIXIS_RCW_SRC_SD); + qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x20); + qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x21); +#else + printf("Not implemented\n"); +#endif + } else if (strcmp(argv[1], "qspi") == 0) { +#ifdef QIXIS_LBMAP_QSPI + QIXIS_WRITE(rst_ctl, 0x30); + QIXIS_WRITE(rcfg_ctl, 0); + set_lbmap(QIXIS_LBMAP_QSPI); + set_rcw_src(QIXIS_RCW_SRC_QSPI); + qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x20); + qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x21); +#else + printf("Not implemented\n"); +#endif } else if (strcmp(argv[1], "watchdog") == 0) { static char *period[9] = {"2s", "4s", "8s", "16s", "32s", "1min", "2min", "4min", "8min"}; @@ -255,6 +288,9 @@ U_BOOT_CMD( "- hard reset to default bank\n" "qixis_reset altbank - reset to alternate bank\n" "qixis_reset nand - reset to nand\n" + "qixis_reset sd - reset to sd\n" + "qixis_reset sd_qspi - reset to sd with qspi support\n" + "qixis_reset qspi - reset to qspi\n" "qixis watchdog <watchdog_period> - set the watchdog period\n" " period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n" "qixis_reset dump - display the QIXIS registers\n" |