summaryrefslogtreecommitdiff
path: root/board/freescale
diff options
context:
space:
mode:
authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2013-01-30 11:19:17 +0000
committerStefano Babic <sbabic@denx.de>2013-02-12 13:52:31 +0100
commitb42b5b7a243ab3923fd80ab03f950f036b6e1329 (patch)
tree2dec05cd0a9861dd8732da17cc05bc843c2c7765 /board/freescale
parent1791b1f97f71bb4f110ca851ab10479640b7bc05 (diff)
downloadu-boot-imx-b42b5b7a243ab3923fd80ab03f950f036b6e1329.zip
u-boot-imx-b42b5b7a243ab3923fd80ab03f950f036b6e1329.tar.gz
u-boot-imx-b42b5b7a243ab3923fd80ab03f950f036b6e1329.tar.bz2
imx: mx6q DDR3 init: Fix MR0.PPD
MR0.PPD should be set as in MMDCx_MDPDC.SLOW_PD, i.e. to fast-exit mode, which is encoded as 1 in MRS.LMR.MR0.A12 and MMDCx_MDSCR[28]. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
index 51f8c35..d50858d 100644
--- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
+++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
@@ -126,8 +126,8 @@ DATA 4 0x021b001c 0x00008033
DATA 4 0x021b001c 0x0000803B
DATA 4 0x021b001c 0x00428031
DATA 4 0x021b001c 0x00428039
-DATA 4 0x021b001c 0x09408030
-DATA 4 0x021b001c 0x09408038
+DATA 4 0x021b001c 0x19408030
+DATA 4 0x021b001c 0x19408038
DATA 4 0x021b001c 0x04008040
DATA 4 0x021b001c 0x04008048