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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-10-15 17:47:16 +0400
committerKumar Gala <galak@kernel.crashing.org>2009-10-27 10:04:17 -0500
commit3fca80375981fe83d4674a0267183b469a1ea7ff (patch)
tree086e8479c459b16088096832b87ca9d569c43f4c /board/freescale
parent14809b6c21c89dd65abaf3fea7627fb5ea0f78a3 (diff)
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mpc85xx: Configure QE USB for MPC8569E-MDS boards
Setup QE pin multiplexing for USB function, configure needed BCSRs and add some fdt fixups. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/mpc8569mds/bcsr.h4
-rw-r--r--board/freescale/mpc8569mds/mpc8569mds.c32
2 files changed, 36 insertions, 0 deletions
diff --git a/board/freescale/mpc8569mds/bcsr.h b/board/freescale/mpc8569mds/bcsr.h
index 179a54c..091b69c 100644
--- a/board/freescale/mpc8569mds/bcsr.h
+++ b/board/freescale/mpc8569mds/bcsr.h
@@ -72,6 +72,10 @@
#define BCSR16_UPC1_DEV2 0x02
+#define BCSR17_nUSBEN 0x80
+#define BCSR17_nUSBLOWSPD 0x40
+#define BCSR17_USBVCC 0x20
+#define BCSR17_USBMODE 0x10
#define BCSR17_FLASH_nWP 0x01
/*BCSR Utils functions*/
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index ef99a75..cdd7813 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -160,6 +160,15 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
{0, 25, 1, 0, 1}, /* QEUART_RTS */
{1, 23, 2, 0, 1}, /* QEUART_CTS */
+ /* QE USB */
+ {5, 3, 1, 0, 1}, /* USB_OE */
+ {5, 4, 1, 0, 2}, /* USB_TP */
+ {5, 5, 1, 0, 2}, /* USB_TN */
+ {5, 6, 2, 0, 2}, /* USB_RP */
+ {5, 7, 2, 0, 1}, /* USB_RX */
+ {5, 8, 2, 0, 1}, /* USB_RN */
+ {2, 4, 2, 0, 2}, /* CLK5 */
+
/* SPI Flash, M25P40 */
{4, 27, 3, 0, 1}, /* SPI_MOSI */
{4, 28, 3, 0, 1}, /* SPI_MISO */
@@ -479,6 +488,28 @@ static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)
static inline void fdt_board_fixup_esdhc(void *blob, bd_t *bd) {}
#endif
+static void fdt_board_fixup_qe_usb(void *blob, bd_t *bd)
+{
+ u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
+
+ if (hwconfig_subarg_cmp("qe_usb", "speed", "low"))
+ clrbits_8(&bcsr[17], BCSR17_nUSBLOWSPD);
+ else
+ setbits_8(&bcsr[17], BCSR17_nUSBLOWSPD);
+
+ if (hwconfig_subarg_cmp("qe_usb", "mode", "peripheral")) {
+ clrbits_8(&bcsr[17], BCSR17_USBVCC);
+ clrbits_8(&bcsr[17], BCSR17_USBMODE);
+ do_fixup_by_compat(blob, "fsl,mpc8569-qe-usb", "mode",
+ "peripheral", sizeof("peripheral"), 1);
+ } else {
+ setbits_8(&bcsr[17], BCSR17_USBVCC);
+ setbits_8(&bcsr[17], BCSR17_USBMODE);
+ }
+
+ clrbits_8(&bcsr[17], BCSR17_nUSBEN);
+}
+
#ifdef CONFIG_PCIE1
static struct pci_controller pcie1_hose;
#endif /* CONFIG_PCIE1 */
@@ -622,5 +653,6 @@ void ft_board_setup(void *blob, bd_t *bd)
#endif
fdt_board_fixup_esdhc(blob, bd);
fdt_board_fixup_qe_uart(blob, bd);
+ fdt_board_fixup_qe_usb(blob, bd);
}
#endif