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authorAnatolij Gustschin <agust@denx.de>2013-02-08 00:03:44 +0000
committerWolfgang Denk <wd@denx.de>2013-03-09 08:21:46 +0100
commit676c66918a41f32b768abe1cb9fcb5f475682935 (patch)
treea4dfee66e0e8fe9e0774caa251fc63aa2812f28a /board/freescale
parentb84d6d27fc32cb0a069b861147d182655e22c302 (diff)
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mpc512x: use common code for CSx configuration
Remove CSx configurations from board code and only define required CSx macros in the board config file to configure chip select windows and parameters. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/mpc5121ads/mpc5121ads.c21
1 files changed, 0 insertions, 21 deletions
diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c
index 97eeab3..4b58dbc 100644
--- a/board/freescale/mpc5121ads/mpc5121ads.c
+++ b/board/freescale/mpc5121ads/mpc5121ads.c
@@ -84,18 +84,6 @@ void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
int board_early_init_f(void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- u32 spridr;
-
- /*
- * Initialize Local Window for the CPLD registers access (CS2 selects
- * the CPLD chip)
- */
- out_be32(&im->sysconf.lpcs2aw,
- CSAW_START(CONFIG_SYS_CPLD_BASE) |
- CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE)
- );
- out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
- sync_law(&im->sysconf.lpcs2aw);
/*
* Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
@@ -114,15 +102,6 @@ int board_early_init_f(void)
out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32);
}
#endif
- /*
- * Configure Flash Speed
- */
- out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
- spridr = in_be32(&im->sysconf.spridr);
-
- if (SVR_MJREV (spridr) >= 2)
- out_be32 (&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
/*
* Enable clocks