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| author | Terry Lv <r65388@freescale.com> | 2009-05-27 21:43:40 +0800 |
|---|---|---|
| committer | Fred Fan <r01011@freescale.com> | 2009-09-10 17:00:37 +0800 |
| commit | 5001b99606655a6f91984afb54625e4af1ed1058 (patch) | |
| tree | 7c92cb4c20fd7b0e453a7e87aac32ab7f3cf2ffd /board/freescale | |
| parent | 30e188a23150345a74f5a83aab344ac8510d38d9 (diff) | |
| download | u-boot-imx-5001b99606655a6f91984afb54625e4af1ed1058.zip u-boot-imx-5001b99606655a6f91984afb54625e4af1ed1058.tar.gz u-boot-imx-5001b99606655a6f91984afb54625e4af1ed1058.tar.bz2 | |
ENGR00112845 spi nor boot and pmic support for BBG2.
spi nor boot support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/imx51/imx51.c | 44 |
1 files changed, 43 insertions, 1 deletions
diff --git a/board/freescale/imx51/imx51.c b/board/freescale/imx51/imx51.c index c8fe23b..793afa2 100644 --- a/board/freescale/imx51/imx51.c +++ b/board/freescale/imx51/imx51.c @@ -30,6 +30,7 @@ #include <asm/arch/iomux.h> #include <i2c.h> #include "board-imx51.h" +#include <asm/arch/imx_spi.h> DECLARE_GLOBAL_DATA_PTR; @@ -159,7 +160,6 @@ static void setup_expio(void) int board_init(void) { - int pad; setup_soc_rev(); gd->bd->bi_arch_number = MACH_TYPE_MX51_3DS; /* board id for linux */ @@ -200,6 +200,48 @@ int checkboard(void) return 0; } +void spi_io_init(struct imx_spi_dev_t *dev) +{ + switch (dev->base) { + case CSPI1_BASE_ADDR: + /* 000: Select mux mode: ALT0 mux port: MOSI of instance: ecspi1 */ + mxc_request_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_MOSI, 0x105); + + /* 000: Select mux mode: ALT0 mux port: MISO of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_MISO, 0x105); + + if (dev->ss == 0) { + /* de-select SS1 of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS1, 0x85); + /* 000: Select mux mode: ALT0 mux port: SS0 of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, 0x185); + } else if (dev->ss == 1) { + /* de-select SS0 of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, 0x85); + /* 000: Select mux mode: ALT0 mux port: SS1 of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS1, 0x105); + } + + /* 000: Select mux mode: ALT0 mux port: RDY of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_RDY, 0x180); + + /* 000: Select mux mode: ALT0 mux port: SCLK of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SCLK, 0x105); + break; + case CSPI2_BASE_ADDR: + default: + break; + } +} + #ifdef CONFIG_NET_MULTI int board_eth_init(bd_t *bis) { |