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| author | Tom Rini <trini@ti.com> | 2015-01-02 07:42:58 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-01-02 07:42:58 -0500 |
| commit | b4a0b4006fe4d6542899abf402c0569b11aa18e2 (patch) | |
| tree | 2b2916db1ec8ee619b4435167c5e1a0a4a274e02 /board/freescale | |
| parent | a74a4a86a53726ba17de8ab863bec1cd60cf545e (diff) | |
| parent | be2fde60b0de7723d29035ba952a970d9e1ca94d (diff) | |
| download | u-boot-imx-b4a0b4006fe4d6542899abf402c0569b11aa18e2.zip u-boot-imx-b4a0b4006fe4d6542899abf402c0569b11aa18e2.tar.gz u-boot-imx-b4a0b4006fe4d6542899abf402c0569b11aa18e2.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-spi
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mx6slevk/MAINTAINERS | 1 | ||||
| -rw-r--r-- | board/freescale/mx6sxsabresd/mx6sxsabresd.c | 40 |
2 files changed, 41 insertions, 0 deletions
diff --git a/board/freescale/mx6slevk/MAINTAINERS b/board/freescale/mx6slevk/MAINTAINERS index 660af91..18d31a8 100644 --- a/board/freescale/mx6slevk/MAINTAINERS +++ b/board/freescale/mx6slevk/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/freescale/mx6slevk/ F: include/configs/mx6slevk.h F: configs/mx6slevk_defconfig +F: configs/mx6slevk_spinor_defconfig diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index fd8bc72..5cc58ac 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -371,6 +371,42 @@ int board_mmc_init(bd_t *bis) return 0; } +#ifdef CONFIG_FSL_QSPI + +#define QSPI_PAD_CTRL1 \ + (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_HIGH | \ + PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const quadspi_pads[] = { + MX6_PAD_NAND_WP_B__QSPI2_A_DATA_0 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_READY_B__QSPI2_A_DATA_1 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_CE0_B__QSPI2_A_DATA_2 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_CE1_B__QSPI2_A_DATA_3 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_ALE__QSPI2_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_CLE__QSPI2_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_DATA07__QSPI2_A_DQS | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_DATA01__QSPI2_B_DATA_0 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_DATA00__QSPI2_B_DATA_1 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_WE_B__QSPI2_B_DATA_2 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_RE_B__QSPI2_B_DATA_3 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_DATA03__QSPI2_B_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_DATA02__QSPI2_B_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_DATA05__QSPI2_B_DQS | MUX_PAD_CTRL(QSPI_PAD_CTRL1), +}; + +int board_qspi_init(void) +{ + /* Set the iomux */ + imx_iomux_v3_setup_multiple_pads(quadspi_pads, + ARRAY_SIZE(quadspi_pads)); + + /* Set the clock */ + enable_qspi_clk(1); + + return 0; +} +#endif + int board_init(void) { /* Address of boot parameters */ @@ -380,6 +416,10 @@ int board_init(void) setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); #endif +#ifdef CONFIG_FSL_QSPI + board_qspi_init(); +#endif + return 0; } |