diff options
author | vijay rai <vijay.rai@freescale.com> | 2014-08-19 12:46:53 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2014-09-24 13:02:03 -0700 |
commit | 363fb32aca268701a0918d67099fb344194f1746 (patch) | |
tree | 5fd638ac9895f3e22e9776e5f6024b1d160df50d /board/freescale | |
parent | d087e0e26293a34752a6279da85f94a97084686c (diff) | |
download | u-boot-imx-363fb32aca268701a0918d67099fb344194f1746.zip u-boot-imx-363fb32aca268701a0918d67099fb344194f1746.tar.gz u-boot-imx-363fb32aca268701a0918d67099fb344194f1746.tar.bz2 |
powerpc/t104xrdb: Add T1042RDB board support
T1042RDB is a Freescale reference board that hosts the T1042 SoC
(and variants). The board is similar to T1040RDB, T1042 is a reduced
personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch).
T1042RDB is configured with serdes protocol 0x86 which can support
following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
DTSEC1, DTSEC2 are not connected on board.
This Patch
- add T1042RDB support
- updates README file for T1042RDB details and update commands for switching
to alternate banks from vBank0 to vBank4 and vice versa
This patch also does minor clean ups for fdt defines for T1042RDB and
T1042RDB_PI board
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale')
-rw-r--r-- | board/freescale/t104xrdb/MAINTAINERS | 1 | ||||
-rw-r--r-- | board/freescale/t104xrdb/README | 17 | ||||
-rw-r--r-- | board/freescale/t104xrdb/eth.c | 10 |
3 files changed, 26 insertions, 2 deletions
diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 364b0a9..62aae2f 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -6,6 +6,7 @@ F: include/configs/T104xRDB.h F: configs/T1040RDB_defconfig F: configs/T1040RDB_NAND_defconfig F: configs/T1040RDB_SPIFLASH_defconfig +F: configs/T1042RDB_defconfig F: configs/T1042RDB_PI_defconfig F: configs/T1042RDB_PI_NAND_defconfig F: configs/T1042RDB_PI_SPIFLASH_defconfig diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index cdbe1fa..a0f5fa9 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -4,10 +4,23 @@ The T1040RDB is a Freescale reference board that hosts the T1040 SoC (and variants). Variants inclued T1042 presonality of T1040, in which case T1040RDB can also be called T1042RDB. +The T1042RDB is a Freescale reference board that hosts the T1042 SoC +(and variants). The board is similar to T1040RDB, T1040 is a reduced +personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). + The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. (a personality of T1040 SoC). The board is similar to T1040RDB but is designed specially with low power features targeted for Printing Image Market. +Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB +------------------------------------------------------------------------- +Board Si Protocol Targeted Market +------------------------------------------------------------------------- +T1040RDB T1040 0x66 Networking +T1040RDB T1042 0x86 Networking +T1042RDB_PI T1042 0x06 Printing & Imaging + + T1040 SoC Overview ------------------ The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA @@ -194,10 +207,10 @@ The below commands apply to the board Commands for switching to alternate bank. 1. To change from vbank0 to vbank4 - => qixis_reset altbank (it will boot using vbank4) + => cpld reset altbank (it will boot using vbank4) 2.To change from vbank4 to vbank0 - => qixis reset (it will boot using vbank0) + => cpld reset (it will boot using vbank0) NAND boot with 2 Stage boot loader ---------------------------------- diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 63e5f90..c8b6c67 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,6 +43,16 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */ + if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) + fm_info_set_phy_address(i, 0); + /* T1042RDB only supports SGMII on DTSEC3 */ + fm_info_set_phy_address(FM1_DTSEC3, + CONFIG_SYS_SGMII1_PHY_ADDR); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; |