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| author | Chunhe Lan <Chunhe.Lan@freescale.com> | 2014-09-12 14:47:09 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-11-14 11:12:14 -0800 |
| commit | ab06b236f76cfa42f264ee161be190b3e479298f (patch) | |
| tree | 2adc913e66d4c8b1857406d6a8f4142293da5acd /board/freescale/t4rdb/t4240rdb.c | |
| parent | a53dd530013bba81ad6ba87a661ff19b12977c23 (diff) | |
| download | u-boot-imx-ab06b236f76cfa42f264ee161be190b3e479298f.zip u-boot-imx-ab06b236f76cfa42f264ee161be190b3e479298f.tar.gz u-boot-imx-ab06b236f76cfa42f264ee161be190b3e479298f.tar.bz2 | |
powerpc/t4rdb: Add support of CPLD
This support of CPLD includes
- Files and register definitions
- Command to switch alternate bank
- Command to switch default bank
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t4rdb/t4240rdb.c')
| -rw-r--r-- | board/freescale/t4rdb/t4240rdb.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c index afef7e9..2ff77b8 100644 --- a/board/freescale/t4rdb/t4240rdb.c +++ b/board/freescale/t4rdb/t4240rdb.c @@ -20,14 +20,26 @@ #include <fm_eth.h> #include "t4rdb.h" +#include "cpld.h" DECLARE_GLOBAL_DATA_PTR; int checkboard(void) { struct cpu_type *cpu = gd->arch.cpu; + u8 sw; printf("Board: %sRDB, ", cpu->name); + printf("Board rev: 0x%02x CPLD ver: 0x%02x%02x, ", + CPLD_READ(hw_ver), CPLD_READ(sw_maj_ver), CPLD_READ(sw_min_ver)); + + sw = CPLD_READ(vbank); + sw = sw & CPLD_BANK_SEL_MASK; + + if (sw <= 7) + printf("vBank: %d\n", sw); + else + printf("Unsupported Bank=%x\n", sw); puts("SERDES Reference Clocks:\n"); printf(" SERDES1=100MHz SERDES2=156.25MHz\n" |