summaryrefslogtreecommitdiff
path: root/board/freescale/t4qds/t4qds.h
diff options
context:
space:
mode:
authorYork Sun <yorksun@freescale.com>2012-10-11 07:13:37 +0000
committerAndy Fleming <afleming@freescale.com>2012-10-22 15:52:46 -0500
commitee52b188ca2c631427d197056ab7b71b9e23bde7 (patch)
treea463b381ca113a66680557d23092c939883ce2c5 /board/freescale/t4qds/t4qds.h
parent98ffa19053f2d10578a227de4e441698226fde0a (diff)
downloadu-boot-imx-ee52b188ca2c631427d197056ab7b71b9e23bde7.zip
u-boot-imx-ee52b188ca2c631427d197056ab7b71b9e23bde7.tar.gz
u-boot-imx-ee52b188ca2c631427d197056ab7b71b9e23bde7.tar.bz2
powerpc/t4qds: Add T4QDS board
The T4240QDS is a high-performance computing evaluation, development and test platform supporting the T4240 QorIQ Power Architecture™ processor. SERDES Connections 32 lanes grouped into four 8-lane banks Two “front side” banks dedicated to Ethernet Two “back side” banks dedicated to other protocols DDR Controllers Three independant 64-bit DDR3 controllers Supports rates up to 2133 MHz data-rate Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller QIXIS System Logic FPGA Each DDR controller has two DIMM slots. The first slot of each controller has up to 4 chip selects to support single-, dual- and quad-rank DIMMs. The second slot has only 2 chip selects to support single- and dual-rank DIMMs. At any given time, up to total 4 chip selects can be used. Detail information can be found in doc/README.t4qds Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/freescale/t4qds/t4qds.h')
-rw-r--r--board/freescale/t4qds/t4qds.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/board/freescale/t4qds/t4qds.h b/board/freescale/t4qds/t4qds.h
new file mode 100644
index 0000000..c6a3492
--- /dev/null
+++ b/board/freescale/t4qds/t4qds.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CORENET_DS_H__
+#define __CORENET_DS_H__
+
+void fdt_fixup_board_enet(void *blob);
+void pci_of_setup(void *blob, bd_t *bd);
+
+static const int8_t vsc3316_fsm1_tx[8][2] = { {0, 0}, {1, 1}, {6, 6}, {7, 7},
+ {8, 8}, {9, 9}, {14, 14}, {15, 15} };
+
+static const int8_t vsc3316_fsm2_tx[8][2] = { {2, 2}, {3, 3}, {4, 4}, {5, 5},
+ {10, 10}, {11, 11}, {12, 12}, {13, 13} };
+
+static const int8_t vsc3316_fsm1_rx[8][2] = { {2, 12}, {3, 13}, {4, 5}, {5, 4},
+ {10, 11}, {11, 10}, {12, 2}, {13, 3} };
+
+static const int8_t vsc3316_fsm2_rx[8][2] = { {0, 15}, {1, 14}, {6, 7}, {7, 6},
+ {8, 9}, {9, 8}, {14, 1}, {15, 0} };
+#endif