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authorYork Sun <yorksun@freescale.com>2014-06-26 11:14:44 -0700
committerYork Sun <yorksun@freescale.com>2014-07-22 16:25:55 -0700
commit3d75ec95f57224995210db5c5dea8d458cf862fb (patch)
tree4ad21c2e982302743b1d220ae669eef3a26fbb18 /board/freescale/t4qds/t4240qds.c
parentde5191631088e71ba8ed28bb491dafa776058008 (diff)
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driver/ddr: Fix DDR register timing_cfg_8
The field wrtord_bg should add 2 clocks if on the fly chop is enabled, according to DDR controller manual for DDR4. Signed-off-by: York Sun <yorksun@freescale.com>
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