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| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2013-11-22 17:39:12 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-11-25 12:36:55 -0800 |
| commit | f7f155e1e180e2e7743a036016ed917bba581d98 (patch) | |
| tree | ae0fab6b92ade3fd6e715946f9e7fc861654cd2b /board/freescale/t2080qds | |
| parent | c4d0e81156a4b5108057eeaa3999e2aa27b10d4c (diff) | |
| download | u-boot-imx-f7f155e1e180e2e7743a036016ed917bba581d98.zip u-boot-imx-f7f155e1e180e2e7743a036016ed917bba581d98.tar.gz u-boot-imx-f7f155e1e180e2e7743a036016ed917bba581d98.tar.bz2 | |
t2080qds/ramboot: enable PBL tool for t2080qds
Add the default RCW(SerDes 0x66_0x16) and PBI configure file for
T2080QDS board, so we can use PBL tool to generate the ramboot
image to support boot from NAND/SPI/SD.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Diffstat (limited to 'board/freescale/t2080qds')
| -rw-r--r-- | board/freescale/t2080qds/t2080_pbi.cfg | 41 | ||||
| -rw-r--r-- | board/freescale/t2080qds/t2080_rcw.cfg | 8 |
2 files changed, 49 insertions, 0 deletions
diff --git a/board/freescale/t2080qds/t2080_pbi.cfg b/board/freescale/t2080qds/t2080_pbi.cfg new file mode 100644 index 0000000..e200d92 --- /dev/null +++ b/board/freescale/t2080qds/t2080_pbi.cfg @@ -0,0 +1,41 @@ +# +# Copyright 2013 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Refer doc/README.pblimage for more details about how-to configure +# and create PBL boot image +# + +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +#512KB SRAM +09010100 00000000 +09010104 fff80009 +09010f00 08000000 +#enable CPC1 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff80000 +09000d08 81000012 +#Initialize eSPI controller, default configuration is slow for eSPI to +#load data, this configuration comes from u-boot eSPI driver. +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Errata for slowing down the MDC clock to make it <= 2.5 MHZ +094fc030 00008148 +094fd030 00008148 +#Configure alternate space +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Flush PBL data +09138000 00000000 +091380c0 00000000 diff --git a/board/freescale/t2080qds/t2080_rcw.cfg b/board/freescale/t2080qds/t2080_rcw.cfg new file mode 100644 index 0000000..c2ad0fd --- /dev/null +++ b/board/freescale/t2080qds/t2080_rcw.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +#SerDes Protocol: 0x66_0x16 +#Core/DDR: 1533Mhz/2133MT/s +12100017 15000000 00000000 00000000 +66160002 00008400 e8104000 c1000000 +00000000 00000000 00000000 000307fc +00000000 00000000 00000000 00000004 |