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| author | Tom Rini <trini@ti.com> | 2015-01-22 20:04:17 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-01-22 20:04:17 -0500 |
| commit | ec0cc98f2cb7fa217ed0a1a54978e2d8f2fbc20c (patch) | |
| tree | 6bfa9a96dcad59fc12f8825cfaf99c09680075f5 /board/freescale/t104xrdb | |
| parent | 032c6867a2925c95897afe07d1f0678114254cf6 (diff) | |
| parent | db4a1767c09a4696792204d1cac33631cb38424e (diff) | |
| download | u-boot-imx-ec0cc98f2cb7fa217ed0a1a54978e2d8f2fbc20c.zip u-boot-imx-ec0cc98f2cb7fa217ed0a1a54978e2d8f2fbc20c.tar.gz u-boot-imx-ec0cc98f2cb7fa217ed0a1a54978e2d8f2fbc20c.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'board/freescale/t104xrdb')
| -rw-r--r-- | board/freescale/t104xrdb/MAINTAINERS | 1 | ||||
| -rw-r--r-- | board/freescale/t104xrdb/eth.c | 59 |
2 files changed, 58 insertions, 2 deletions
diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index b61e1c0..13d9be9 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -21,3 +21,4 @@ T1040RDB_SECURE_BOOT BOARD M: Aneesh Bansal <aneesh.bansal@freescale.com> S: Maintained F: configs/T1040RDB_SECURE_BOOT_defconfig +F: configs/T1042RDB_SECURE_BOOT_defconfig diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index c8b6c67..7581a4cd 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -6,11 +6,13 @@ #include <common.h> #include <netdev.h> +#include <asm/fsl_serdes.h> #include <asm/immap_85xx.h> #include <fm_eth.h> #include <fsl_mdio.h> #include <malloc.h> #include <asm/fsl_dtsec.h> +#include <vsc9953.h> #include "../common/fman.h" @@ -20,6 +22,11 @@ int board_eth_init(bd_t *bis) struct memac_mdio_info memac_mdio_info; unsigned int i; int phy_addr = 0; +#ifdef CONFIG_VSC9953 + phy_interface_t phy_int; + struct mii_dev *bus; +#endif + printf("Initializing Fman\n"); memac_mdio_info.regs = @@ -72,10 +79,58 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(i, 0); break; } - fm_info_set_mdio(i, - miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME)); + if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_QSGMII || + fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_NONE) + fm_info_set_mdio(i, NULL); + else + fm_info_set_mdio(i, + miiphy_get_dev_by_name( + DEFAULT_FM_MDIO_NAME)); + } + +#ifdef CONFIG_VSC9953 + /* SerDes configured for QSGMII */ + if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A) >= 0) { + for (i = 0; i < 4; i++) { + bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); + phy_addr = CONFIG_SYS_FM1_QSGMII11_PHY_ADDR + i; + phy_int = PHY_INTERFACE_MODE_QSGMII; + + vsc9953_port_info_set_mdio(i, bus); + vsc9953_port_info_set_phy_address(i, phy_addr); + vsc9953_port_info_set_phy_int(i, phy_int); + vsc9953_port_enable(i); + } + } + if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_B) >= 0) { + for (i = 4; i < 8; i++) { + bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); + phy_addr = CONFIG_SYS_FM1_QSGMII21_PHY_ADDR + i - 4; + phy_int = PHY_INTERFACE_MODE_QSGMII; + + vsc9953_port_info_set_mdio(i, bus); + vsc9953_port_info_set_phy_address(i, phy_addr); + vsc9953_port_info_set_phy_int(i, phy_int); + vsc9953_port_enable(i); + } } + /* Connect DTSEC1 to L2 switch if it doesn't have a PHY */ + if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC1) < 0) + vsc9953_port_enable(8); + + /* Connect DTSEC2 to L2 switch if it doesn't have a PHY */ + if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC2) < 0) { + /* Enable L2 On MAC2 using SCFG */ + struct ccsr_scfg *scfg = (struct ccsr_scfg *) + CONFIG_SYS_MPC85xx_SCFG; + + out_be32(&scfg->esgmiiselcr, in_be32(&scfg->esgmiiselcr) | + (0x80000000)); + vsc9953_port_enable(9); + } +#endif + cpu_eth_init(bis); #endif |