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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-08-30 17:40:11 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-09-29 19:01:06 -0500 |
| commit | f8bc7bb5a79b392db3af9f62b63caefab8afbc31 (patch) | |
| tree | 9ee756eebfdcab351f4a00a52fa4505b5e2f0feb /board/freescale/p2041rdb/Makefile | |
| parent | 360275b362e50f480b09c7c8770019ea4287afad (diff) | |
| download | u-boot-imx-f8bc7bb5a79b392db3af9f62b63caefab8afbc31.zip u-boot-imx-f8bc7bb5a79b392db3af9f62b63caefab8afbc31.tar.gz u-boot-imx-f8bc7bb5a79b392db3af9f62b63caefab8afbc31.tar.bz2 | |
powerpc/85xx: Refactor P2041RDB to use common p_corenet files
The P2041RDB has almost identical setup for TLB, LAWS, and PCI with
other P-Series CoreNet platforms.
The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the
CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the
TLB and LAW setup tables.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/p2041rdb/Makefile')
| -rw-r--r-- | board/freescale/p2041rdb/Makefile | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/board/freescale/p2041rdb/Makefile b/board/freescale/p2041rdb/Makefile index b4cb83e..8d4da3a 100644 --- a/board/freescale/p2041rdb/Makefile +++ b/board/freescale/p2041rdb/Makefile @@ -30,9 +30,6 @@ COBJS-y += $(BOARD).o COBJS-y += cpld.o COBJS-y += ddr.o COBJS-y += eth.o -COBJS-y += law.o -COBJS-y += tlb.o -COBJS-$(CONFIG_PCI) += pci.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) |