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authorAndy Fleming <afleming@freescale.com>2012-10-23 19:03:46 -0500
committerAndy Fleming <afleming@freescale.com>2012-11-27 17:45:17 -0600
commite76cd5d4cf311da7d40adc5d6e9b425509cf0205 (patch)
tree36c37082482ef310e6419ce57b1b352edccdb29d /board/freescale/p2020ds
parent66dc452bfe13b0e276adddf3997b9c5abc00115d (diff)
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8xxx: Change all 8*xx_DDR addresses to 8xxx
There were a number of shared files that were using CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and several variants (DDR2, DDR3). A recent patchset added 85xx-specific ones to code which was used by 86xx systems. After reviewing places where these constants were used, and noting that the type definitions of the pointers assigned to point to those addresses were the same, the cleanest approach to fixing this problem was to unify the namespace for the 85xx, 83xx, and 86xx DDR address definitions. This patch does: s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g All 85xx, 86xx, and 83xx have been built with this change. Signed-off-by: Andy Fleming <afleming@freescale.com> Tested-by: Andy Fleming <afleming@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/p2020ds')
-rw-r--r--board/freescale/p2020ds/p2020ds.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 3188f59..d4a4451 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -84,7 +84,7 @@ int checkboard(void)
phys_size_t fixed_sdram(void)
{
- volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR;
+ volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
uint d_init;
ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;