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| author | Minkyu Kang <mk7.kang@samsung.com> | 2010-01-15 22:41:58 +0900 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-01-15 22:41:58 +0900 |
| commit | e598dfc22c8789991d165714bec53b2390fc999d (patch) | |
| tree | cf3c704c4b00e06605bdfe23384b8af97022efa6 /board/freescale/p2020ds/p2020ds.c | |
| parent | e7ae13a57b4cbaa2cd3da8ffca614853d9d84230 (diff) | |
| parent | 1c2a8e359ebbec0dbef62f5b54c72f9cd72ccd59 (diff) | |
| download | u-boot-imx-e598dfc22c8789991d165714bec53b2390fc999d.zip u-boot-imx-e598dfc22c8789991d165714bec53b2390fc999d.tar.gz u-boot-imx-e598dfc22c8789991d165714bec53b2390fc999d.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
cpu/arm_cortexa8/s5pc1xx/cache.c
include/asm-arm/arch-s5pc1xx/sys_proto.h
include/sja1000.h
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/freescale/p2020ds/p2020ds.c')
| -rw-r--r-- | board/freescale/p2020ds/p2020ds.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 9878fba..599caa2 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -197,7 +197,7 @@ void pci_init_board(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); struct fsl_pci_info pci_info[3]; - u32 devdisr, pordevsr, io_sel, host_agent; + u32 devdisr, pordevsr, io_sel; int first_free_busno = 0; int num = 0; @@ -206,10 +206,8 @@ void pci_init_board(void) devdisr = in_be32(&gur->devdisr); pordevsr = in_be32(&gur->pordevsr); io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; - host_agent = (in_be32(&gur->porbmsr) & MPC85xx_PORBMSR_HA) >> 16; - debug(" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", - devdisr, io_sel, host_agent); + debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) printf(" eTSEC2 is in sgmii mode.\n"); @@ -218,16 +216,16 @@ void pci_init_board(void) puts("\n"); #ifdef CONFIG_PCIE2 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { SET_STD_PCIE_INFO(pci_info[num], 2); + pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); printf(" PCIE2 connected to ULI as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie2_hose, first_free_busno, pcie_ep); + &pcie2_hose, first_free_busno); /* * The workaround doesn't work on p2020 because the location @@ -258,16 +256,16 @@ void pci_init_board(void) #endif #ifdef CONFIG_PCIE3 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { SET_STD_PCIE_INFO(pci_info[num], 3); + pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); printf(" PCIE3 connected to Slot 1 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie3_hose, first_free_busno, pcie_ep); + &pcie3_hose, first_free_busno); } else { printf(" PCIE3: disabled\n"); } @@ -277,16 +275,16 @@ void pci_init_board(void) #endif #ifdef CONFIG_PCIE1 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { SET_STD_PCIE_INFO(pci_info[num], 1); + pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno, pcie_ep); + &pcie1_hose, first_free_busno); } else { printf(" PCIE1: disabled\n"); } @@ -300,7 +298,7 @@ void pci_init_board(void) int board_early_init_r(void) { const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; - const u8 flash_esel = 2; + const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); /* * Remap Boot flash + PROMJET region to caching-inhibited |