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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2013-08-13 16:41:19 +0800
committerYork Sun <yorksun@freescale.com>2013-08-20 10:46:58 -0700
commite1a2a3401956f546ac18cdc58716860286868425 (patch)
tree3bc3f3e1c84e7ccc9870c538b5ce1015f494fabc /board/freescale/p1010rdb
parent1c68d01eea92137482b980318e2a7f7c0ebef2d4 (diff)
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powerpc/p1010rdb: fix calculating ddr_freq_mhz
There was a bug for calculating ddr_freq_mhz, it should be divided by 1000000 rather than 0x1000000. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/p1010rdb')
-rw-r--r--board/freescale/p1010rdb/spl_minimal.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c
index 73289f3..d0e712e 100644
--- a/board/freescale/p1010rdb/spl_minimal.c
+++ b/board/freescale/p1010rdb/spl_minimal.c
@@ -26,7 +26,7 @@ void sdram_init(void)
ddr_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO;
ddr_ratio = ddr_ratio >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
- ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 0x1000000;
+ ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 1000000;
/* mask off E bit */
u32 svr = SVR_SOC_VER(mfspr(SPRN_SVR));