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author | Tom Rini <trini@ti.com> | 2014-02-25 12:44:13 -0500 |
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committer | Tom Rini <trini@ti.com> | 2014-02-25 13:55:49 -0500 |
commit | a7e8c15f71456d55ccb27f843862af03a00e0957 (patch) | |
tree | 67028131161fdded15fd8625aabf3de03cc98b00 /board/freescale/p1010rdb/tlb.c | |
parent | 4c48cfb58b66924c52cd5c5d960e04cf6d7064ca (diff) | |
parent | 91d7746df89f858548fe535137b4b185a6a76d59 (diff) | |
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.c
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/freescale/p1010rdb/tlb.c')
-rw-r--r-- | board/freescale/p1010rdb/tlb.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index a3d36b3..af40f97 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -73,10 +73,18 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 7, BOOKE_PAGESZ_1M, 1), -#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL) +#if defined(CONFIG_SYS_RAMBOOT) || \ + (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 8, BOOKE_PAGESZ_1G, 1) + 0, 8, BOOKE_PAGESZ_1G, 1), +#endif + +#ifdef CONFIG_SYS_INIT_L2_ADDR + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, + 0, 11, BOOKE_PAGESZ_256K, 1) #endif }; |