diff options
author | York Sun <yorksun@freescale.com> | 2012-07-06 17:10:33 -0500 |
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committer | Andy Fleming <afleming@freescale.com> | 2012-07-06 17:30:33 -0500 |
commit | 48f6a5c348453fc3ab33aaa91e5e4198a28678ff (patch) | |
tree | f1adc995cec4ced7d867de36230f1aa600c4d216 /board/freescale/p1010rdb/ddr.c | |
parent | 1e9ea85f7dffe949ca5e4845e6336810c144e06d (diff) | |
download | u-boot-imx-48f6a5c348453fc3ab33aaa91e5e4198a28678ff.zip u-boot-imx-48f6a5c348453fc3ab33aaa91e5e4198a28678ff.tar.gz u-boot-imx-48f6a5c348453fc3ab33aaa91e5e4198a28678ff.tar.bz2 |
powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER()
We don't care E bit of SVR in most cases. Clear E bit for SVR_SOC_VER().
This will simplify the coding. Use IS_E_PROCESSOR() to identify SoC with
encryption. Remove all _E entries from SVR list and CPU list.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/p1010rdb/ddr.c')
-rw-r--r-- | board/freescale/p1010rdb/ddr.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c index 36c8545..10c5a42 100644 --- a/board/freescale/p1010rdb/ddr.c +++ b/board/freescale/p1010rdb/ddr.c @@ -101,7 +101,7 @@ unsigned long get_sdram_size(void) cpu = gd->cpu; /* P1014 and it's derivatives support max 16it DDR width */ - if (cpu->soc_ver == SVR_P1014 || cpu->soc_ver == SVR_P1014_E) + if (cpu->soc_ver == SVR_P1014) ddr_size = (CONFIG_SYS_DRAM_SIZE / 2); else ddr_size = CONFIG_SYS_DRAM_SIZE; @@ -146,7 +146,7 @@ phys_size_t fixed_sdram(void) cpu = gd->cpu; /* P1014 and it's derivatives support max 16bit DDR width */ - if (cpu->soc_ver == SVR_P1014 || cpu->soc_ver == SVR_P1014_E) { + if (cpu->soc_ver == SVR_P1014) { ddr_cfg_regs.ddr_sdram_cfg |= SDRAM_CFG_16_BE; ddr_cfg_regs.cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS >> 1; ddr_cfg_regs.ddr_sdram_cfg &= ~0x00180000; @@ -238,7 +238,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, cpu = gd->cpu; /* P1014 and it's derivatives support max 16it DDR width */ - if (cpu->soc_ver == SVR_P1014 || cpu->soc_ver == SVR_P1014_E) + if (cpu->soc_ver == SVR_P1014) popts->data_bus_width = DDR_DATA_BUS_WIDTH_16; for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { |