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| author | Wolfgang Denk <wd@denx.de> | 2012-07-22 21:58:26 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2012-07-22 21:58:26 +0200 |
| commit | 00c60f9131b513af9fc85d0cf1b6a6148d754a90 (patch) | |
| tree | 6c6d54f58bebfa8f23ae3641ad458fa8c8f47f19 /board/freescale/p1010rdb/README | |
| parent | b264bcf2b97fed0ae754037106d0d88de02c704e (diff) | |
| download | u-boot-imx-00c60f9131b513af9fc85d0cf1b6a6148d754a90.zip u-boot-imx-00c60f9131b513af9fc85d0cf1b6a6148d754a90.tar.gz u-boot-imx-00c60f9131b513af9fc85d0cf1b6a6148d754a90.tar.bz2 | |
Minor Coding Style Cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/freescale/p1010rdb/README')
| -rw-r--r-- | board/freescale/p1010rdb/README | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/board/freescale/p1010rdb/README b/board/freescale/p1010rdb/README index 022c023..7f18aaa 100644 --- a/board/freescale/p1010rdb/README +++ b/board/freescale/p1010rdb/README @@ -146,7 +146,6 @@ Build and burn u-boot to NAND flash 3. Check SW4[1:4]= 1000 and SW6[4]=1, then power on. - Build and burn u-boot to SPI flash ================================== 1. Build u-boot-spi.bin image @@ -166,7 +165,6 @@ Build and burn u-boot to SPI flash 3. Check SW4[1:4]= 0110 and SW6[4]=0, then power on. - CPLD POR setting registers ========================== 1. Set POR switch selection register (addr 0xFFB00011) to 0. @@ -197,7 +195,6 @@ Switch from NAND to NOR boot with Core/CCB/DDR (800/400/667 MHz): => reset - Boot Linux from network using TFTP on P1010RDB ============================================== Place uImage, p1010rdb.dtb and rootfs files in the TFTP disk area. |