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author | Ye Li <ye.li@nxp.com> | 2017-02-15 17:45:17 +0800 |
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committer | Ye Li <ye.li@nxp.com> | 2017-04-05 17:24:35 +0800 |
commit | be3d3d5c140a1617c1ce35e8657f2d45bc8c70eb (patch) | |
tree | 750bfe36238116f16eceba048b2160b77376aadb /board/freescale/mx7ulp_evk/mx7ulp_evk.c | |
parent | fce3f6e59f6ae5a171bbb6581420712c4aaa14c3 (diff) | |
download | u-boot-imx-be3d3d5c140a1617c1ce35e8657f2d45bc8c70eb.zip u-boot-imx-be3d3d5c140a1617c1ce35e8657f2d45bc8c70eb.tar.gz u-boot-imx-be3d3d5c140a1617c1ce35e8657f2d45bc8c70eb.tar.bz2 |
MLK-13929-6 mx7ulp_evk: Enable the MIPI DSI splashscreen
Enable and setup board level codes for MIPI DSI splashscreen on EVK board.
User needs set env variable"panel=HX8363_WVGA" for displaying.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 49cb68f5c17e42f9290336e1252ace6ac7d0b5ce)
Diffstat (limited to 'board/freescale/mx7ulp_evk/mx7ulp_evk.c')
-rw-r--r-- | board/freescale/mx7ulp_evk/mx7ulp_evk.c | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c index afad505..4fd4e6d 100644 --- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c +++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c @@ -12,6 +12,7 @@ #include <asm/gpio.h> #include <usb.h> #include <dm.h> +#include <asm/imx-common/video.h> DECLARE_GLOBAL_DATA_PTR; @@ -19,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR; #define QSPI_PAD_CTRL1 (PAD_CTL_PUS_UP | PAD_CTL_DSE) #define OTG_ID_GPIO_PAD_CTRL (PAD_CTL_IBE_ENABLE) +#define MIPI_GPIO_PAD_CTRL (PAD_CTL_OBE_ENABLE) + int dram_init(void) { gd->ram_size = PHYS_SDRAM_SIZE; @@ -105,6 +108,73 @@ int board_early_init_f(void) return 0; } +#ifdef CONFIG_VIDEO_MXS + +#define MIPI_RESET_GPIO IMX_GPIO_NR(3, 19) +#define LED_PWM_EN_GPIO IMX_GPIO_NR(6, 2) + +static iomux_cfg_t const mipi_reset_pad[] = { + MX7ULP_PAD_PTC19__PTC19 | MUX_PAD_CTRL(MIPI_GPIO_PAD_CTRL), +}; + +static iomux_cfg_t const led_pwm_en_pad[] = { + MX7ULP_PAD_PTF2__PTF2 | MUX_PAD_CTRL(MIPI_GPIO_PAD_CTRL), +}; + +int board_mipi_panel_reset(void) +{ + gpio_direction_output(MIPI_RESET_GPIO, 0); + udelay(1000); + gpio_direction_output(MIPI_RESET_GPIO, 1); + return 0; +} + +int board_mipi_panel_shutdown(void) +{ + gpio_direction_output(MIPI_RESET_GPIO, 0); + gpio_direction_output(LED_PWM_EN_GPIO, 0); + return 0; +} + +void setup_mipi_reset(void) +{ + mx7ulp_iomux_setup_multiple_pads(mipi_reset_pad, ARRAY_SIZE(mipi_reset_pad)); + gpio_request(MIPI_RESET_GPIO, "mipi_panel_reset"); +} + +void do_enable_mipi_dsi(struct display_info_t const *dev) +{ + setup_mipi_reset(); + + /* Enable backlight */ + mx7ulp_iomux_setup_multiple_pads(led_pwm_en_pad, ARRAY_SIZE(mipi_reset_pad)); + gpio_request(LED_PWM_EN_GPIO, "led_pwm_en"); + gpio_direction_output(LED_PWM_EN_GPIO, 1); +} + +struct display_info_t const displays[] = {{ + .bus = LCDIF_RBASE, + .addr = 0, + .pixfmt = 24, + .detect = NULL, + .enable = do_enable_mipi_dsi, + .mode = { + .name = "HX8363_WVGA", + .xres = 480, + .yres = 854, + .pixclock = 41042, + .left_margin = 40, + .right_margin = 60, + .upper_margin = 3, + .lower_margin = 3, + .hsync_len = 8, + .vsync_len = 4, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +} } }; +size_t display_count = ARRAY_SIZE(displays); +#endif + int board_init(void) { /* address of boot parameters */ |