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| author | Fugang Duan <fugang.duan@nxp.com> | 2017-05-04 16:36:13 +0800 |
|---|---|---|
| committer | Fugang Duan <fugang.duan@nxp.com> | 2017-05-04 16:41:30 +0800 |
| commit | 9c9835ebceb5465d4d2cbe94e9fa091a24a88d1a (patch) | |
| tree | d697e63fd33c93c347533651535ca539696713ba /board/freescale/mx6ullevk/mx6ullevk.c | |
| parent | c60560c34cb0393747e9a9461ecc9c8286eb7074 (diff) | |
| download | u-boot-imx-9c9835ebceb5465d4d2cbe94e9fa091a24a88d1a.zip u-boot-imx-9c9835ebceb5465d4d2cbe94e9fa091a24a88d1a.tar.gz u-boot-imx-9c9835ebceb5465d4d2cbe94e9fa091a24a88d1a.tar.bz2 | |
MLK-14777 imx: mx6ul/mx6ull/mx7d: correct the usage of the macro PFUZE3000_SW1AB_SETP()
Commit:894a4b4da7e2 add the voltage configuration macro that base on
the 0.1mV precision, and i.MX6UL/i.MX6ULL/i.MX7D use the macro as 1mV
prevision that cause the conversion are wrong, then some boards cannot
boot up in ldo bypass mode.
The patch just correct the usage of PFUZE3000_SW1AB_SETP().
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'board/freescale/mx6ullevk/mx6ullevk.c')
| -rw-r--r-- | board/freescale/mx6ullevk/mx6ullevk.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index aef4ce9..507343e 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -125,11 +125,11 @@ void ldo_mode_set(int ldo_bypass) /* decrease VDDARM to 1.275V */ pmic_reg_read(p, PFUZE3000_SW1BVOLT, &value); value &= ~0x1f; - value |= PFUZE3000_SW1AB_SETP(1275); + value |= PFUZE3000_SW1AB_SETP(12750); pmic_reg_write(p, PFUZE3000_SW1BVOLT, value); set_anatop_bypass(1); - vddarm = PFUZE3000_SW1AB_SETP(1175); + vddarm = PFUZE3000_SW1AB_SETP(11750); pmic_reg_read(p, PFUZE3000_SW1BVOLT, &value); value &= ~0x1f; @@ -202,11 +202,11 @@ void ldo_mode_set(int ldo_bypass) /* decrease VDDARM to 1.275V */ value = pmic_reg_read(dev, PFUZE3000_SW1BVOLT); value &= ~0x1f; - value |= PFUZE3000_SW1AB_SETP(1275); + value |= PFUZE3000_SW1AB_SETP(12750); pmic_reg_write(dev, PFUZE3000_SW1BVOLT, value); set_anatop_bypass(1); - vddarm = PFUZE3000_SW1AB_SETP(1175); + vddarm = PFUZE3000_SW1AB_SETP(11750); value = pmic_reg_read(dev, PFUZE3000_SW1BVOLT); value &= ~0x1f; |