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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-03-31 15:05:42 +0800 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 15:05:29 +0800 |
| commit | c6e73057773052b8f7d7b1bbc795d3efbc174a45 (patch) | |
| tree | 6f03b90f012a05e4b95b0595d9d241b6c38a4bab /board/freescale/mx6sxsabreauto | |
| parent | e2c7345dc0646aa697bdba53d2e9ea19e27b2599 (diff) | |
| download | u-boot-imx-c6e73057773052b8f7d7b1bbc795d3efbc174a45.zip u-boot-imx-c6e73057773052b8f7d7b1bbc795d3efbc174a45.tar.gz u-boot-imx-c6e73057773052b8f7d7b1bbc795d3efbc174a45.tar.bz2 | |
MLK-10774-41 imx: mx6sx: update VDDSOC standby voltage
This patch is from commit "f2c5102bf3763d77a227c1cba7fcd49e3db53a1d".
"
According the latest datasheet Rev.0,2/2015, the VDDSOC_IN voltage in standby/DSM
mode is 1.05V. As we use PFM mode of pFuse and this mode has 3% tolerance issue,
so the standby mode voltage should be (1.05 * 1.03) = 1.0815, we use 1.10V as the
minimal step is 25mV. For i.MX6sx SDB RevB boards, the VDDARM and VDDSOC use the
same supply, so the DSM voltage for VDDARM also need to be updated.
"
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'board/freescale/mx6sxsabreauto')
| -rw-r--r-- | board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index 589922f..6a026d4 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -132,6 +132,12 @@ int power_init_board(void) if (ret < 0) return ret; + /* set SW1C standby volatage 1.10V */ + pmic_reg_read(pfuze, PFUZE100_SW1CSTBY, ®); + reg &= ~0x3f; + reg |= PFUZE100_SW1ABC_SETP(11000); + pmic_reg_write(pfuze, PFUZE100_SW1CSTBY, reg); + /* Enable power of VGEN5 3V3, needed for SD3 */ pmic_reg_read(pfuze, PFUZE100_VGEN5VOL, ®); reg &= ~LDO_VOL_MASK; |