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authorFabio Estevam <fabio.estevam@freescale.com>2015-02-28 14:25:46 -0300
committerStefano Babic <sbabic@denx.de>2015-03-02 11:55:26 +0100
commit16edd347f0e4e0c77c9a667855e3293b58bb3fda (patch)
treecd2b68fb6156c014acf0b010ae3c87028c11c95c /board/freescale/mx6slevk/mx6slevk.c
parent0200020bc2b8192c31dc57c600865267f51bface (diff)
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mx6slevk: Provide a proper pad configuration for OTG1_ID pin
Pass the same pad configuration as done in the kernel so that OTG1_ID pin can properly work in device mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'board/freescale/mx6slevk/mx6slevk.c')
-rw-r--r--board/freescale/mx6slevk/mx6slevk.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index c65f72b..7c18c90 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -50,6 +50,11 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+#define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
+ PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
+ PAD_CTL_DSE_80ohm | PAD_CTL_HYS | \
+ PAD_CTL_SRE_FAST)
+
#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
int dram_init(void)
@@ -285,7 +290,7 @@ static int setup_fec(void)
static iomux_v3_cfg_t const usb_otg_pads[] = {
/* OTG1 */
MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
+ MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(OTGID_PAD_CTRL),
/* OTG2 */
MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
};