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authorBai Ping <b51503@freescale.com>2015-10-30 03:14:47 +0800
committerBai Ping <b51503@freescale.com>2015-10-30 23:08:21 +0800
commit53e6f33d2bd847298ab93c377a7dfb1c8f03d94d (patch)
treef2d4fe9e7175ca1bb85cca48240a874357e24ff2 /board/freescale/mx6sabresd/mx6sabresd.c
parente81e2d53c4a1d4cb312f92a197a7548825634f41 (diff)
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MLK-11795-02 imx: upate the pmic standby voltage for imx6qp
According to the latest datasheet(Rev. B, 07/2015), the VDD_SOC_IN standby voltage should be 1.05V and on i.MX6QP, we can use the PMIC 'APS' mode in standby. we add a 25mV margin to cover the IR drop and board tolerance, so the standby voltage of VDD_SOC_IN should be setting to 1.075V. Signed-off-by: Bai Ping <b51503@freescale.com> (cherry picked from commit 3c38fae6dafd3b90fae2598dcbedf6cb7aa6f6af)
Diffstat (limited to 'board/freescale/mx6sabresd/mx6sabresd.c')
-rw-r--r--board/freescale/mx6sabresd/mx6sabresd.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 8d45c8c..6ef5131 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -978,7 +978,11 @@ int power_init_board(void)
if (!pfuze)
return -ENODEV;
- ret = pfuze_mode_init(pfuze, APS_PFM);
+ if (is_mx6dqp())
+ ret = pfuze_mode_init(pfuze, APS_APS);
+ else
+ ret = pfuze_mode_init(pfuze, APS_PFM);
+
if (ret < 0)
return ret;
@@ -995,10 +999,10 @@ int power_init_board(void)
pmic_reg_write(pfuze, PFUZE100_VGEN5VOL, reg);
if (is_mx6dqp()) {
- /* set SW1C staby volatage 0.975V*/
+ /* set SW1C staby volatage 1.075V*/
pmic_reg_read(pfuze, PFUZE100_SW1CSTBY, &reg);
reg &= ~0x3f;
- reg |= 0x1b;
+ reg |= 0x1f;
pmic_reg_write(pfuze, PFUZE100_SW1CSTBY, reg);
/* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */