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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 10:52:52 +0800 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 15:10:57 +0800 |
| commit | dd842f32b6d8d770e844790643ece352f92b8c5e (patch) | |
| tree | 976176297a3cf2b160bf73632e0a88e86c227852 /board/freescale/mx6qsabreauto/mx6qsabreauto.c | |
| parent | b7f3f9a6100519c784085ea9f6e575162555fb42 (diff) | |
| download | u-boot-imx-dd842f32b6d8d770e844790643ece352f92b8c5e.zip u-boot-imx-dd842f32b6d8d770e844790643ece352f92b8c5e.tar.gz u-boot-imx-dd842f32b6d8d770e844790643ece352f92b8c5e.tar.bz2 | |
MLK-10774-53 imx: update setting pmic volatage
We should not rely on pfuze_common_init to set the voltage,
may be we should remove the voltage settings in pfuze_common_init.
This patch is to setting the voltages in power_init_board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'board/freescale/mx6qsabreauto/mx6qsabreauto.c')
| -rw-r--r-- | board/freescale/mx6qsabreauto/mx6qsabreauto.c | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 2ee8210..e20cd91 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -768,12 +768,40 @@ int board_init(void) static struct pmic *pfuze; int power_init_board(void) { - unsigned int value; + unsigned int value, ret; pfuze = pfuze_common_init(I2C_PMIC); if (!pfuze) return -ENODEV; + ret = pfuze_mode_init(pfuze, APS_PFM); + if (ret < 0) + return ret; + + /* set SW1AB staby volatage 0.975V*/ + pmic_reg_read(pfuze, PFUZE100_SW1ABSTBY, &value); + value &= ~0x3f; + value |= 0x1b; + pmic_reg_write(pfuze, PFUZE100_SW1ABSTBY, value); + + /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ + pmic_reg_read(pfuze, PFUZE100_SW1ABCONF, &value); + value &= ~0xc0; + value |= 0x40; + pmic_reg_write(pfuze, PFUZE100_SW1ABCONF, value); + + /* set SW1C staby volatage 0.975V*/ + pmic_reg_read(pfuze, PFUZE100_SW1CSTBY, &value); + value &= ~0x3f; + value |= 0x1b; + pmic_reg_write(pfuze, PFUZE100_SW1CSTBY, value); + + /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */ + pmic_reg_read(pfuze, PFUZE100_SW1CCONF, &value); + value &= ~0xc0; + value |= 0x40; + pmic_reg_write(pfuze, PFUZE100_SW1CCONF, value); + if (is_mx6dqp()) { /* set SW2 staby volatage 0.975V*/ pmic_reg_read(pfuze, PFUZE100_SW2STBY, &value); @@ -782,7 +810,7 @@ int power_init_board(void) pmic_reg_write(pfuze, PFUZE100_SW2STBY, value); } - return pfuze_mode_init(pfuze, APS_PFM); + return 0; } #ifdef CONFIG_LDO_BYPASS_CHECK |