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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-05-11 09:25:36 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-05-11 09:25:36 +0200
commitec7023db8dc95966919589541f1ca09355a3f7a5 (patch)
tree69be08a0b3f19e3e1d99ea7829931f8f800a01d9 /board/freescale/mx6qarm2/mx6qarm2.c
parente825b100d209a9d3c79b2998452cafa94eec986a (diff)
parentd782c1fe7246301143ed78c0d86ea6c81f9325f9 (diff)
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Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts: drivers/mtd/nand/mxc_nand_spl.c include/configs/m28evk.h
Diffstat (limited to 'board/freescale/mx6qarm2/mx6qarm2.c')
-rw-r--r--board/freescale/mx6qarm2/mx6qarm2.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c
index ff7f5e8..e336746 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -35,17 +35,16 @@
DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
- PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
int dram_init(void)
{