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| author | Zeng Zhaoming <b32542@freescale.com> | 2011-06-23 07:52:37 +0800 |
|---|---|---|
| committer | Zeng Zhaoming <b32542@freescale.com> | 2011-06-27 02:07:35 +0800 |
| commit | 3c5c5630bb6e55471d8279d6789ce9c6e851b589 (patch) | |
| tree | 48989322df742df5bdf6ab1b010866ac6eb4bbb7 /board/freescale/mx6q_sabreauto/mx6q_sabreauto.c | |
| parent | 15f996b62fb5d2709ff66fbca0f6d0ca376acd13 (diff) | |
| download | u-boot-imx-3c5c5630bb6e55471d8279d6789ce9c6e851b589.zip u-boot-imx-3c5c5630bb6e55471d8279d6789ce9c6e851b589.tar.gz u-boot-imx-3c5c5630bb6e55471d8279d6789ce9c6e851b589.tar.bz2 | |
ENGR00139198: iMX61 uBoot add ENET support
Add ENET and AR8031 PHY support to uboot.
To make it works on sabreauto, need do following changes:
1. rework phy to output 125M clock from CLK_25M signal,
and the 125M clock input to SoC as reference clock to generate
RGMII_TXC clock.
2. Enable TXC delay in PHY debug register.
3. set ENET working in RMII mode.
4. set ENET working at 1000M or 100M/10M.
5. set ENET TX fifo to maximum to avoid underrun error.
6. force AR8031 PHY working at 100M
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Diffstat (limited to 'board/freescale/mx6q_sabreauto/mx6q_sabreauto.c')
| -rw-r--r-- | board/freescale/mx6q_sabreauto/mx6q_sabreauto.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c b/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c index 068a3f0..135dff0 100644 --- a/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c +++ b/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c @@ -341,12 +341,15 @@ iomux_v3_cfg_t enet_pads[] = { MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2, MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3, MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL, + MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK, MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC, MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0, MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1, MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2, MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3, MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL, + MX6Q_PAD_GPIO_0__CCM_CLKO, + MX6Q_PAD_GPIO_3__CCM_CLKO2, }; void enet_board_init(void) @@ -362,7 +365,6 @@ void enet_board_init(void) mxc_iomux_v3_setup_pad(enet_reset); - printf("enet_board_init\n"); /* phy reset: gpio4-15 */ reg = readl(GPIO4_BASE_ADDR + 0x0); reg &= ~0x8000; |