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| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-10-01 08:36:25 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2012-10-16 12:35:10 +0200 |
| commit | a2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8 (patch) | |
| tree | 03120c255250a910bf8235366fa93c4adfa3f674 /board/freescale/mx53ard | |
| parent | 6e3dc127545247f123de063a6a101960e3eb2ccd (diff) | |
| download | u-boot-imx-a2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8.zip u-boot-imx-a2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8.tar.gz u-boot-imx-a2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8.tar.bz2 | |
mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
Diffstat (limited to 'board/freescale/mx53ard')
| -rw-r--r-- | board/freescale/mx53ard/mx53ard.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index 08c7795..2fc8570 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -26,6 +26,7 @@ #include <asm/arch/mx5x_pins.h> #include <asm/arch/sys_proto.h> #include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> #include <asm/arch/iomux.h> #include <asm/errno.h> #include <netdev.h> @@ -106,6 +107,9 @@ int board_mmc_init(bd_t *bis) u32 index; s32 status = 0; + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { switch (index) { case 0: |