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author | Terry Lv <r65388@freescale.com> | 2011-01-05 17:03:28 +0800 |
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committer | Terry Lv <r65388@freescale.com> | 2011-01-07 15:32:24 +0800 |
commit | 1fa596e19e8ea43414d88835726b98fb90ffc877 (patch) | |
tree | b0b4b5186471cee0572d6d6342d5a962206c804f /board/freescale/mx53_smd | |
parent | 5d92b32e22a49b32a35b5d456c8d38af04f53422 (diff) | |
download | u-boot-imx-1fa596e19e8ea43414d88835726b98fb90ffc877.zip u-boot-imx-1fa596e19e8ea43414d88835726b98fb90ffc877.tar.gz u-boot-imx-1fa596e19e8ea43414d88835726b98fb90ffc877.tar.bz2 |
ENGR00137604: Change PLL4 to 455MHz for mx53
Required by display to set ldb.
We need to set PLL4 to 455MHz.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'board/freescale/mx53_smd')
-rw-r--r-- | board/freescale/mx53_smd/lowlevel_init.S | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/board/freescale/mx53_smd/lowlevel_init.S b/board/freescale/mx53_smd/lowlevel_init.S index 363db56..5feaaf1 100644 --- a/board/freescale/mx53_smd/lowlevel_init.S +++ b/board/freescale/mx53_smd/lowlevel_init.S @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -133,6 +133,8 @@ setup_pll PLL3_BASE_ADDR, 216 + setup_pll PLL4_BASE_ADDR, 455 + /* Set the platform clock dividers */ ldr r0, PLATFORM_BASE_ADDR_W ldr r1, PLATFORM_CLOCK_DIV_W @@ -236,5 +238,8 @@ W_DP_MFN_400: .word DP_MFN_400 W_DP_OP_216: .word DP_OP_216 W_DP_MFD_216: .word DP_MFD_216 W_DP_MFN_216: .word DP_MFN_216 +W_DP_OP_455: .word DP_OP_455 +W_DP_MFD_455: .word DP_MFD_455 +W_DP_MFN_455: .word DP_MFN_455 PLATFORM_BASE_ADDR_W: .word ARM_BASE_ADDR PLATFORM_CLOCK_DIV_W: .word 0x00000124 |