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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2013-05-06 01:33:51 +0000
committerStefano Babic <sbabic@denx.de>2013-05-06 15:21:59 +0200
commit68088ceed7eb059d1aa50ffe7c372cf8b058797e (patch)
tree251c592097910241f269ac97632345503ef81c19 /board/freescale/mx35pdk
parent714dc001fcd99809f5166b4383343a7b0d16fd6b (diff)
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imx: mx35pdk: Fix MUX2_CTR GPIO
MUX2_CTR is on GPIO1[5], not GPIO2[5], and it needs to be set high in order to connect the FEC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Diffstat (limited to 'board/freescale/mx35pdk')
-rw-r--r--board/freescale/mx35pdk/mx35pdk.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c
index 12e84d7..9f667d2 100644
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ b/board/freescale/mx35pdk/mx35pdk.c
@@ -245,7 +245,7 @@ int board_late_init(void)
imx_iomux_v3_setup_pad(MX35_PAD_COMPARE__GPIO1_5);
- gpio_direction_output(IMX_GPIO_NR(2, 5), 1);
+ gpio_direction_output(IMX_GPIO_NR(1, 5), 1);
}
val = mc9sdz60_reg_read(MC9SDZ60_REG_GPIO_1) | 0x04;