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| author | Sammy He <r62914@freescale.com> | 2009-11-23 11:41:09 +0800 |
|---|---|---|
| committer | Sammy He <r62914@freescale.com> | 2009-11-23 11:42:34 +0800 |
| commit | 758e16168151f671ee8c97790392bfc8e0746866 (patch) | |
| tree | f27118ea62156e7e6091709bd617a90a05c9038c /board/freescale/mx25_3stack | |
| parent | 74d5620b3daf9125366489d979a0c36d6f752291 (diff) | |
| download | u-boot-imx-758e16168151f671ee8c97790392bfc8e0746866.zip u-boot-imx-758e16168151f671ee8c97790392bfc8e0746866.tar.gz u-boot-imx-758e16168151f671ee8c97790392bfc8e0746866.tar.bz2 | |
ENGR00118682 Update the MX25 MAX Priority
Update the priority list for MX25 MAX xbar.
Signed-off-by: Sammy He <r62914@freescale.com>
Diffstat (limited to 'board/freescale/mx25_3stack')
| -rw-r--r-- | board/freescale/mx25_3stack/lowlevel_init.S | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/board/freescale/mx25_3stack/lowlevel_init.S b/board/freescale/mx25_3stack/lowlevel_init.S index 61bb589..69e8b84 100644 --- a/board/freescale/mx25_3stack/lowlevel_init.S +++ b/board/freescale/mx25_3stack/lowlevel_init.S @@ -44,7 +44,32 @@ lowlevel_init: REG 0xB8002054, 0x22252521 REG 0xB8002058, 0x22220A00 + /* MAX (Multi-Layer AHB Crossbar Switch) setup */ + /* MAX - priority for MX25 is (SDHC2/SDMA)>USBOTG>RTIC>IAHB>DAHB */ + ldr r0, =MAX_BASE + ldr r1, =0x00002143 + str r1, [r0, #0x000] /* for S0 */ + str r1, [r0, #0x100] /* for S1 */ + str r1, [r0, #0x200] /* for S2 */ + str r1, [r0, #0x300] /* for S3 */ + str r1, [r0, #0x400] /* for S4 */ + /* SGPCR - always park on last master */ + ldr r1, =0x10 + str r1, [r0, #0x010] /* for S0 */ + str r1, [r0, #0x110] /* for S1 */ + str r1, [r0, #0x210] /* for S2 */ + str r1, [r0, #0x310] /* for S3 */ + str r1, [r0, #0x410] /* for S4 */ + /* MGPCR - restore default values */ + ldr r1, =0x0 + str r1, [r0, #0x800] /* for M0 */ + str r1, [r0, #0x900] /* for M1 */ + str r1, [r0, #0xA00] /* for M2 */ + str r1, [r0, #0xB00] /* for M3 */ + str r1, [r0, #0xC00] /* for M4 */ + /* M3IF setup */ + ldr r1, =M3IF_BASE ldr r0, =0x00000001 str r0, [r1] /* M3IF control reg */ |