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author | Peter Tyser <ptyser@xes-inc.com> | 2010-09-29 13:37:26 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2010-10-20 02:38:40 -0500 |
commit | 9a268e4b7c5564bd713defcc3d043767af0d6605 (patch) | |
tree | 8edf2db3e042101ea1f588b5a402bca33bd753aa /board/freescale/mpc8641hpcn | |
parent | 9d64c6bb4a0db0f1c74a46f1cabe85d5a7a8a19b (diff) | |
download | u-boot-imx-9a268e4b7c5564bd713defcc3d043767af0d6605.zip u-boot-imx-9a268e4b7c5564bd713defcc3d043767af0d6605.tar.gz u-boot-imx-9a268e4b7c5564bd713defcc3d043767af0d6605.tar.bz2 |
mpc8641hpcn: Update PCI code
Update to use the recent, common FSL PCI initialization code.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8641hpcn')
-rw-r--r-- | board/freescale/mpc8641hpcn/mpc8641hpcn.c | 97 |
1 files changed, 22 insertions, 75 deletions
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index fee310a..092ead6 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -142,56 +142,26 @@ int first_free_busno = 0; void pci_init_board(void) { + struct fsl_pci_info pci_info[2]; + int pcie_ep; + int num = 0; + #ifdef CONFIG_PCIE1 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; - struct pci_controller *hose = &pcie1_hose; - struct pci_region *r = hose->regions; volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; volatile ccsr_gur_t *gur = &immap->im_gur; - uint devdisr = gur->devdisr; + uint devdisr = in_be32(&gur->devdisr); uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL) >> MPC8641_PORDEVSR_IO_SEL_SHIFT; int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); -#ifdef DEBUG - uint host1_agent = (gur->porbmsr & MPC8641_PORBMSR_HA) - >> MPC8641_PORBMSR_HA_SHIFT; - uint pex1_agent = (host1_agent == 0) || (host1_agent == 1); -#endif if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { - debug("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host"); - debug("0x%08x=0x%08x ", &pci->pme_msg_det, pci->pme_msg_det); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; - debug(" with errors. Clearing. Now 0x%08x", - pci->pme_msg_det); - } - debug("\n"); - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE1_MEM_BUS, - CONFIG_SYS_PCIE1_MEM_PHYS, - CONFIG_SYS_PCIE1_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCIE1_IO_BUS, - CONFIG_SYS_PCIE1_IO_PHYS, - CONFIG_SYS_PCIE1_IO_SIZE, - PCI_REGION_IO); - - hose->region_count = r - hose->regions; - - hose->first_busno=first_free_busno; - - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - first_free_busno=hose->last_busno+1; - printf (" PCI-EXPRESS 1 on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); + SET_STD_PCIE_INFO(pci_info[num], 1); + pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); + printf(" PCIE1 connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie1_hose, first_free_busno); /* * Activate ULI1575 legacy chip by performing a fake @@ -201,45 +171,22 @@ void pci_init_board(void) + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000))); } else { - puts("PCI-EXPRESS 1: Disabled\n"); + puts(" PCIE1: disabled\n"); } -} #else - puts("PCI-EXPRESS1: Disabled\n"); + puts(" PCIE1: disabled\n"); #endif /* CONFIG_PCIE1 */ #ifdef CONFIG_PCIE2 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; - struct pci_controller *hose = &pcie2_hose; - struct pci_region *r = hose->regions; - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE2_MEM_BUS, - CONFIG_SYS_PCIE2_MEM_PHYS, - CONFIG_SYS_PCIE2_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCIE2_IO_BUS, - CONFIG_SYS_PCIE2_IO_PHYS, - CONFIG_SYS_PCIE2_IO_SIZE, - PCI_REGION_IO); - - hose->region_count = r - hose->regions; - - hose->first_busno=first_free_busno; - - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - first_free_busno=hose->last_busno+1; - printf (" PCI-EXPRESS 2 on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); -} + SET_STD_PCIE_INFO(pci_info[num], 2); + pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); + printf(" PCIE2 connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie2_hose, first_free_busno); #else - puts("PCI-EXPRESS 2: Disabled\n"); + puts(" PCIE2: disabled\n"); #endif /* CONFIG_PCIE2 */ } |