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author | Kumar Gala <galak@kernel.crashing.org> | 2010-12-17 10:47:36 -0600 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-14 01:32:20 -0600 |
commit | 64e55d5ed40e4de2dd52910f7634304fbebe1840 (patch) | |
tree | 7e17d76ae058b083991cda857562f681b6e8a699 /board/freescale/mpc8641hpcn/mpc8641hpcn.c | |
parent | 5f7b31b00098eb3d4c960136d042fc73f619eca4 (diff) | |
download | u-boot-imx-64e55d5ed40e4de2dd52910f7634304fbebe1840.zip u-boot-imx-64e55d5ed40e4de2dd52910f7634304fbebe1840.tar.gz u-boot-imx-64e55d5ed40e4de2dd52910f7634304fbebe1840.tar.bz2 |
powerpc/86xx: Rework MPC8641HPCN pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8641HPCN board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8641hpcn/mpc8641hpcn.c')
-rw-r--r-- | board/freescale/mpc8641hpcn/mpc8641hpcn.c | 48 |
1 files changed, 1 insertions, 47 deletions
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index e951021..166ff0c 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -127,64 +127,18 @@ fixed_sdram(void) } #endif /* !defined(CONFIG_SPD_EEPROM) */ - -#if defined(CONFIG_PCI) -static struct pci_controller pcie1_hose; -#endif /* CONFIG_PCI */ - -#ifdef CONFIG_PCIE2 -static struct pci_controller pcie2_hose; -#endif /* CONFIG_PCIE2 */ - -int first_free_busno = 0; - void pci_init_board(void) { - struct fsl_pci_info pci_info[2]; - int pcie_ep; - int num = 0; + fsl_pcie_init_board(0); #ifdef CONFIG_PCIE1 - volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; - volatile ccsr_gur_t *gur = &immap->im_gur; - uint devdisr = in_be32(&gur->devdisr); - int pcie_configured = is_serdes_configured(PCIE1); - - if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { - SET_STD_PCIE_INFO(pci_info[num], 1); - pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf("PCIE1: connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); - first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno); - /* * Activate ULI1575 legacy chip by performing a fake * memory access. Needed to make ULI RTC work. */ in_be32((unsigned *) ((char *)(CONFIG_SYS_PCIE1_MEM_VIRT + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000))); - - } else { - puts("PCIE1: disabled\n"); - } -#else - puts("PCIE1: disabled\n"); #endif /* CONFIG_PCIE1 */ - -#ifdef CONFIG_PCIE2 - SET_STD_PCIE_INFO(pci_info[num], 2); - pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf("PCIE2: connected as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); - first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie2_hose, first_free_busno); -#else - puts("PCIE2: disabled\n"); -#endif /* CONFIG_PCIE2 */ - } |