diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2010-07-09 00:02:34 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-20 04:37:11 -0500 |
| commit | 46f3e3851dac0c4acecf4192d8e13c8521ce98b4 (patch) | |
| tree | 3b9cd80f04cd5237756377d1c702ec7f87b4c6e2 /board/freescale/mpc8641hpcn/law.c | |
| parent | dd2cda3dbd0130445e5186c6f038016474666337 (diff) | |
| download | u-boot-imx-46f3e3851dac0c4acecf4192d8e13c8521ce98b4.zip u-boot-imx-46f3e3851dac0c4acecf4192d8e13c8521ce98b4.tar.gz u-boot-imx-46f3e3851dac0c4acecf4192d8e13c8521ce98b4.tar.bz2 | |
powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641
The MPC8641 boards actually only have PCIE not PCI. Rename so we are
uniform with regards to names so we can replace this code with templated
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8641hpcn/law.c')
| -rw-r--r-- | board/freescale/mpc8641hpcn/law.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/board/freescale/mpc8641hpcn/law.c b/board/freescale/mpc8641hpcn/law.c index bd357b8..8c8ce95 100644 --- a/board/freescale/mpc8641hpcn/law.c +++ b/board/freescale/mpc8641hpcn/law.c @@ -1,5 +1,5 @@ /* - * Copyright 2008 Freescale Semiconductor, Inc. + * Copyright 2008,2010 Freescale Semiconductor, Inc. * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -32,14 +32,14 @@ * * 0x0000_0000 0x7fff_ffff DDR 2G * if PCI (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT) - * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M + * 0x8000_0000 0x9fff_ffff PCIE1 MEM 512M + * 0xa000_0000 0xbfff_ffff PCIE2 MEM 512M * else if RIO (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT) * 0x8000_0000 0x9fff_ffff RapidIO 512M * endif * (prepend 0xf_0000_0000 if CONFIG_PHYS_64BIT) - * 0xffc0_0000 0xffc0_ffff PCI1 IO 64K - * 0xffc1_0000 0xffc1_ffff PCI2 IO 64K + * 0xffc0_0000 0xffc0_ffff PCIE1 IO 64K + * 0xffc1_0000 0xffc1_ffff PCIE2 IO 64K * 0xffe0_0000 0xffef_ffff CCSRBAR 1M * 0xffdf_0000 0xffe0_0000 PIXIS, CF 64K * 0xef80_0000 0xefff_ffff FLASH (boot bank) 8M @@ -54,10 +54,10 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), #endif #ifdef CONFIG_PCI - SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_1), - SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_2), #elif defined(CONFIG_RIO) SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO), #endif |