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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/freescale/mpc8610hpcd
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
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rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/freescale/mpc8610hpcd')
-rw-r--r--board/freescale/mpc8610hpcd/law.c16
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c74
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c4
3 files changed, 47 insertions, 47 deletions
diff --git a/board/freescale/mpc8610hpcd/law.c b/board/freescale/mpc8610hpcd/law.c
index 91b922b..2aad28a 100644
--- a/board/freescale/mpc8610hpcd/law.c
+++ b/board/freescale/mpc8610hpcd/law.c
@@ -29,16 +29,16 @@
struct law_entry law_table[] = {
#if !defined(CONFIG_SPD_EEPROM)
- SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1),
+ SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1),
#endif
- SET_LAW(CFG_PCIE1_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1),
- SET_LAW(CFG_PCIE2_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2),
+ SET_LAW(CONFIG_SYS_PCIE1_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1),
+ SET_LAW(CONFIG_SYS_PCIE2_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2),
SET_LAW(PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
- SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1),
- SET_LAW(CFG_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2),
- SET_LAW(CFG_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
- SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_1)
+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1),
+ SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2),
+ SET_LAW(CONFIG_SYS_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+ SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_1),
+ SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_1)
};
int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 130f7aa..5faeca1 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -48,7 +48,7 @@ void mpc8610hpcd_diu_init(void);
/* called before any console output */
int board_early_init_f(void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
gur->gpiocr |= 0x88aa5500; /* DIU16, IR1, UART0, UART2 */
@@ -98,7 +98,7 @@ int misc_init_r(void)
int checkboard(void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
printf ("Board: MPC8610HPCD, System ID: 0x%02x, "
@@ -129,7 +129,7 @@ initdram(int board_type)
dram_size = fixed_sdram();
#endif
-#if defined(CFG_RAMBOOT)
+#if defined(CONFIG_SYS_RAMBOOT)
puts(" DDR: ");
return dram_size;
#endif
@@ -153,8 +153,8 @@ initdram(int board_type)
long int fixed_sdram(void)
{
-#if !defined(CFG_RAMBOOT)
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+#if !defined(CONFIG_SYS_RAMBOOT)
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_ddr_t *ddr = &immap->im_ddr1;
uint d_init;
@@ -201,7 +201,7 @@ long int fixed_sdram(void)
return 512 * 1024 * 1024;
#endif
- return CFG_SDRAM_SIZE * 1024 * 1024;
+ return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
}
#endif
@@ -242,7 +242,7 @@ int first_free_busno = 0;
void pci_init_board(void)
{
- volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
uint devdisr = gur->devdisr;
uint io_sel = (gur->pordevsr & MPC8610_PORDEVSR_IO_SEL)
@@ -255,7 +255,7 @@ void pci_init_board(void)
#ifdef CONFIG_PCIE1
{
- volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE1_ADDR;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pcie1_hose;
int pcie_configured = (io_sel == 1) || (io_sel == 4);
@@ -271,23 +271,23 @@ void pci_init_board(void)
/* inbound */
pci_set_region(hose->regions + 0,
- CFG_PCI_MEMORY_BUS,
- CFG_PCI_MEMORY_PHYS,
- CFG_PCI_MEMORY_SIZE,
+ CONFIG_SYS_PCI_MEMORY_BUS,
+ CONFIG_SYS_PCI_MEMORY_PHYS,
+ CONFIG_SYS_PCI_MEMORY_SIZE,
PCI_REGION_MEM | PCI_REGION_MEMORY);
/* outbound memory */
pci_set_region(hose->regions + 1,
- CFG_PCIE1_MEM_BASE,
- CFG_PCIE1_MEM_PHYS,
- CFG_PCIE1_MEM_SIZE,
+ CONFIG_SYS_PCIE1_MEM_BASE,
+ CONFIG_SYS_PCIE1_MEM_PHYS,
+ CONFIG_SYS_PCIE1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(hose->regions + 2,
- CFG_PCIE1_IO_BASE,
- CFG_PCIE1_IO_PHYS,
- CFG_PCIE1_IO_SIZE,
+ CONFIG_SYS_PCIE1_IO_BASE,
+ CONFIG_SYS_PCIE1_IO_PHYS,
+ CONFIG_SYS_PCIE1_IO_SIZE,
PCI_REGION_IO);
hose->region_count = 3;
@@ -312,7 +312,7 @@ void pci_init_board(void)
#ifdef CONFIG_PCIE2
{
- volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE2_ADDR;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pcie2_hose;
@@ -330,23 +330,23 @@ void pci_init_board(void)
/* inbound */
pci_set_region(hose->regions + 0,
- CFG_PCI_MEMORY_BUS,
- CFG_PCI_MEMORY_PHYS,
- CFG_PCI_MEMORY_SIZE,
+ CONFIG_SYS_PCI_MEMORY_BUS,
+ CONFIG_SYS_PCI_MEMORY_PHYS,
+ CONFIG_SYS_PCI_MEMORY_SIZE,
PCI_REGION_MEM | PCI_REGION_MEMORY);
/* outbound memory */
pci_set_region(hose->regions + 1,
- CFG_PCIE2_MEM_BASE,
- CFG_PCIE2_MEM_PHYS,
- CFG_PCIE2_MEM_SIZE,
+ CONFIG_SYS_PCIE2_MEM_BASE,
+ CONFIG_SYS_PCIE2_MEM_PHYS,
+ CONFIG_SYS_PCIE2_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(hose->regions + 2,
- CFG_PCIE2_IO_BASE,
- CFG_PCIE2_IO_PHYS,
- CFG_PCIE2_IO_SIZE,
+ CONFIG_SYS_PCIE2_IO_BASE,
+ CONFIG_SYS_PCIE2_IO_PHYS,
+ CONFIG_SYS_PCIE2_IO_SIZE,
PCI_REGION_IO);
hose->region_count = 3;
@@ -370,7 +370,7 @@ void pci_init_board(void)
#ifdef CONFIG_PCI1
{
- volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCI1_ADDR;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pci1_hose;
int pci_agent = (host_agent >= 4) && (host_agent <= 6);
@@ -383,23 +383,23 @@ void pci_init_board(void)
/* inbound */
pci_set_region(hose->regions + 0,
- CFG_PCI_MEMORY_BUS,
- CFG_PCI_MEMORY_PHYS,
- CFG_PCI_MEMORY_SIZE,
+ CONFIG_SYS_PCI_MEMORY_BUS,
+ CONFIG_SYS_PCI_MEMORY_PHYS,
+ CONFIG_SYS_PCI_MEMORY_SIZE,
PCI_REGION_MEM | PCI_REGION_MEMORY);
/* outbound memory */
pci_set_region(hose->regions + 1,
- CFG_PCI1_MEM_BASE,
- CFG_PCI1_MEM_PHYS,
- CFG_PCI1_MEM_SIZE,
+ CONFIG_SYS_PCI1_MEM_BASE,
+ CONFIG_SYS_PCI1_MEM_PHYS,
+ CONFIG_SYS_PCI1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(hose->regions + 2,
- CFG_PCI1_IO_BASE,
- CFG_PCI1_IO_PHYS,
- CFG_PCI1_IO_SIZE,
+ CONFIG_SYS_PCI1_IO_BASE,
+ CONFIG_SYS_PCI1_IO_PHYS,
+ CONFIG_SYS_PCI1_IO_SIZE,
PCI_REGION_IO);
hose->region_count = 3;
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
index 4db941c..cd25d4a 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
@@ -43,7 +43,7 @@ static int xres, yres;
void diu_set_pixel_clock(unsigned int pixclock)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
unsigned long speed_ccb, temp, pixval;
@@ -137,7 +137,7 @@ int mpc8610diu_init_show_bmp(cmd_tbl_t *cmdtp,
}
U_BOOT_CMD(
- diufb, CFG_MAXARGS, 1, mpc8610diu_init_show_bmp,
+ diufb, CONFIG_SYS_MAXARGS, 1, mpc8610diu_init_show_bmp,
"diufb init | addr - Init or Display BMP file\n",
"init\n - initialize DIU\n"
"addr\n - display bmp at address 'addr'\n"