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authorDave Liu <daveliu@freescale.com>2008-10-28 17:46:23 +0800
committerJon Loeliger <jdl@freescale.com>2008-10-30 10:27:44 -0500
commit137a2dfd11ac51ae3154f13f323609b33a4a072e (patch)
tree9d8130332dfb50101c17809d5b42a96749b2016c /board/freescale/mpc8610hpcd
parentdc2adad85bf580d65916c940683f6e9671e8a5dd (diff)
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86xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 86xx processors have the ECC data init feature, and the new DDR code is using the feature, we don't need the way with DMA to init memory again. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Kumar Gala <kumar.gala@freescale.com>
Diffstat (limited to 'board/freescale/mpc8610hpcd')
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index dacd2a9..8d3b822 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -36,10 +36,6 @@
#include "../common/pixis.h"
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
void sdram_init(void);
long int fixed_sdram(void);
void mpc8610hpcd_diu_init(void);
@@ -134,13 +130,6 @@ initdram(int board_type)
return dram_size;
#endif
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
puts(" DDR: ");
return dram_size;
}