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author | Kumar Gala <galak@kernel.crashing.org> | 2009-07-22 10:12:39 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2009-07-22 10:16:55 -0500 |
commit | 048e7efe91f66094f868281c12e488ce2bae8976 (patch) | |
tree | 730a52155fd4d11069608a45399bf20e7fc796ba /board/freescale/mpc8610hpcd | |
parent | 0a6d0c6320b77bd6572393a93e6b8ccdf39c7100 (diff) | |
download | u-boot-imx-048e7efe91f66094f868281c12e488ce2bae8976.zip u-boot-imx-048e7efe91f66094f868281c12e488ce2bae8976.tar.gz u-boot-imx-048e7efe91f66094f868281c12e488ce2bae8976.tar.bz2 |
85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards
The pixis code used in8/out8 all over the place. Replace it with
in_8/out_8 macros.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8610hpcd')
-rw-r--r-- | board/freescale/mpc8610hpcd/mpc8610hpcd.c | 25 | ||||
-rw-r--r-- | board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c | 13 |
2 files changed, 21 insertions, 17 deletions
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 419b2c1..2ac169b 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -55,16 +55,17 @@ int board_early_init_f(void) int misc_init_r(void) { u8 tmp_val, version; + u8 *pixis_base = (u8 *)PIXIS_BASE; /*Do not use 8259PIC*/ - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x80); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x80); /*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/ - version = in8(PIXIS_BASE + PIXIS_PVER); + version = in_8(pixis_base + PIXIS_PVER); if(version >= 0x07) { - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xbf); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xbf); } /* Using this for DIU init before the driver in linux takes over @@ -96,11 +97,12 @@ int checkboard(void) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; + u8 *pixis_base = (u8 *)PIXIS_BASE; printf ("Board: MPC8610HPCD, System ID: 0x%02x, " "System Version: 0x%02x, FPGA Version: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); mcm->abcr |= 0x00010000; /* 0 */ mcm->hpmr3 = 0x80000008; /* 4c */ @@ -438,10 +440,9 @@ get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; - ulong a; + u8 *pixis_base = (u8 *)PIXIS_BASE; - a = PIXIS_BASE + PIXIS_SPD; - i = in8(a); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x07; switch (i) { @@ -481,7 +482,9 @@ int board_eth_init(bd_t *bis) void board_reset(void) { - out8(PIXIS_BASE + PIXIS_RST, 0); + u8 *pixis_base = (u8 *)PIXIS_BASE; + + out_8(pixis_base + PIXIS_RST, 0); while (1) ; diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c index 63eba0c..4186a2e 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c @@ -69,9 +69,10 @@ void mpc8610hpcd_diu_init(void) unsigned int pixel_format; unsigned char tmp_val; unsigned char pixis_arch; + u8 *pixis_base = (u8 *)PIXIS_BASE; - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - pixis_arch = in8(PIXIS_BASE + PIXIS_VER); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + pixis_arch = in_8(pixis_base + PIXIS_VER); monitor_port = getenv("monitor"); if (!strncmp(monitor_port, "0", 1)) { /* 0 - DVI */ @@ -82,28 +83,28 @@ void mpc8610hpcd_diu_init(void) else pixel_format = 0x88883316; gamma_fix = 0; - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08); } else if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */ xres = 1024; yres = 768; pixel_format = 0x88883316; gamma_fix = 0; - out8(PIXIS_BASE + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10); + out_8(pixis_base + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10); } else if (!strncmp(monitor_port, "2", 1)) { /* 2 - Double link LVDS */ xres = 1280; yres = 1024; pixel_format = 0x88883316; gamma_fix = 1; - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xe7); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xe7); } else { /* DVI */ xres = 1280; yres = 1024; pixel_format = 0x88882317; gamma_fix = 0; - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08); } fsl_diu_init(xres, pixel_format, gamma_fix, |