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author | Kumar Gala <galak@kernel.crashing.org> | 2009-11-04 13:01:17 -0600 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2010-01-05 13:49:06 -0600 |
commit | 42c01b9d1f0132a6d82e2c8333b236b1e3b0831f (patch) | |
tree | 2453d0fb01529b7c4c562de5228da889e14f17ac /board/freescale/mpc8572ds | |
parent | 5e3d7050cf127dfcd6ab260c551e9183299d0dca (diff) | |
download | u-boot-imx-42c01b9d1f0132a6d82e2c8333b236b1e3b0831f.zip u-boot-imx-42c01b9d1f0132a6d82e2c8333b236b1e3b0831f.tar.gz u-boot-imx-42c01b9d1f0132a6d82e2c8333b236b1e3b0831f.tar.bz2 |
ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host. Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8572ds')
-rw-r--r-- | board/freescale/mpc8572ds/mpc8572ds.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 933dd12..556846a 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -1,5 +1,5 @@ /* - * Copyright 2007-2008 Freescale Semiconductor, Inc. + * Copyright 2007-2009 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -165,7 +165,7 @@ void pci_init_board(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); struct fsl_pci_info pci_info[3]; - u32 devdisr, pordevsr, io_sel, host_agent, temp32; + u32 devdisr, pordevsr, io_sel, temp32; int first_free_busno = 0; int num = 0; @@ -174,10 +174,8 @@ void pci_init_board(void) devdisr = in_be32(&gur->devdisr); pordevsr = in_be32(&gur->pordevsr); io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; - host_agent = (in_be32(&gur->porbmsr) & MPC85xx_PORBMSR_HA) >> 16; - debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", - devdisr, io_sel, host_agent); + debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS)) printf (" eTSEC1 is in sgmii mode.\n"); @@ -190,11 +188,11 @@ void pci_init_board(void) puts("\n"); #ifdef CONFIG_PCIE3 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){ SET_STD_PCIE_INFO(pci_info[num], 3); + pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); printf (" PCIE3 connected to ULI as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); @@ -222,11 +220,11 @@ void pci_init_board(void) #endif #ifdef CONFIG_PCIE2 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){ SET_STD_PCIE_INFO(pci_info[num], 2); + pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); @@ -242,11 +240,11 @@ void pci_init_board(void) #endif #ifdef CONFIG_PCIE1 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); + pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); |