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authorKumar Gala <galak@kernel.crashing.org>2008-12-02 16:08:40 -0600
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2009-01-23 17:03:13 -0600
commitaca5f018a8386b85469482ed9867e3e29a2437d0 (patch)
tree549f45497d86a9efcddeae589b8228d07041820d /board/freescale/mpc8572ds
parent5af0fdd81c3370c3a51421208fda568bdcbbec23 (diff)
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85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards
Introduce a new define to seperate out the virtual address that PCI IO space is at from the physical address. In most situations these are mapped 1:1. However any code accessing the bus should use VIRT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/freescale/mpc8572ds')
-rw-r--r--board/freescale/mpc8572ds/tlb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8572ds/tlb.c b/board/freescale/mpc8572ds/tlb.c
index 594ff05..d832f89 100644
--- a/board/freescale/mpc8572ds/tlb.c
+++ b/board/freescale/mpc8572ds/tlb.c
@@ -73,7 +73,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
0, 5, BOOKE_PAGESZ_256M, 1),
/* *I*G* - PCI I/O */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_PHYS, CONFIG_SYS_PCIE3_IO_PHYS,
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_VIRT, CONFIG_SYS_PCIE3_IO_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_256K, 1),