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| author | Kumar Gala <galak@kernel.crashing.org> | 2009-07-14 22:42:01 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-07-22 09:42:22 -0500 |
| commit | 6bb5b412291177e6edd42f9a80e5c5afe57a6a0f (patch) | |
| tree | e76ab269e5a3d402a738ad8b9716282bf2103a86 /board/freescale/mpc8572ds | |
| parent | 9af9c6bdc16da53772c56b1a79c2c91701fe94e6 (diff) | |
| download | u-boot-imx-6bb5b412291177e6edd42f9a80e5c5afe57a6a0f.zip u-boot-imx-6bb5b412291177e6edd42f9a80e5c5afe57a6a0f.tar.gz u-boot-imx-6bb5b412291177e6edd42f9a80e5c5afe57a6a0f.tar.bz2 | |
85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8572ds')
| -rw-r--r-- | board/freescale/mpc8572ds/mpc8572ds.c | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 4b95617..51231d7 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -42,14 +42,34 @@ long int fixed_sdram(void); int checkboard (void) { + u8 vboot; + u8 *pixis_base = (u8 *)PIXIS_BASE; + puts ("Board: MPC8572DS "); #ifdef CONFIG_PHYS_64BIT puts ("(36-bit addrmap) "); #endif printf ("Sys ID: 0x%02x, " - "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); + + vboot = in_8(pixis_base + PIXIS_VBOOT); + switch ((vboot & PIXIS_VBOOT_LBMAP) >> 6) { + case PIXIS_VBOOT_LBMAP_NOR0: + puts ("vBank: 0\n"); + break; + case PIXIS_VBOOT_LBMAP_PJET: + puts ("Promjet\n"); + break; + case PIXIS_VBOOT_LBMAP_NAND: + puts ("NAND\n"); + break; + case PIXIS_VBOOT_LBMAP_NOR1: + puts ("vBank: 1\n"); + break; + } + return 0; } |