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authorKumar Gala <galak@kernel.crashing.org>2008-09-22 14:11:11 -0500
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:04 +0200
commit7c0d4a7508d252d2d7c137eeb376814132dda30f (patch)
tree305460a7a5f0d9c30ea94b7e6382129a9900750e /board/freescale/mpc8572ds/tlb.c
parent54e091d3b603a3332c619199ca83a07e95960da4 (diff)
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85xx: Improve flash remapping on MPC8572DS & MPC8536DS
Changing the flash from cacheable to cache-inhibited was taking a significant amount of time due to the fact that we were iterating over the full 256M of flash. Instead we can just flush the L1 d-cache and invalidate the i-cache. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8572ds/tlb.c')
-rw-r--r--board/freescale/mpc8572ds/tlb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8572ds/tlb.c b/board/freescale/mpc8572ds/tlb.c
index 46d9e4a..1c5ed3f 100644
--- a/board/freescale/mpc8572ds/tlb.c
+++ b/board/freescale/mpc8572ds/tlb.c
@@ -59,7 +59,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* W**G* - Flash/promjet, localbus */
/* This will be changed to *I*G* after relocation to RAM. */
SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
+ MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
0, 2, BOOKE_PAGESZ_256M, 1),
/* *I*G* - PCI */