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authorHaiying Wang <Haiying.Wang@freescale.com>2008-10-29 13:32:59 -0400
committerScott Wood <scottwood@freescale.com>2008-10-29 13:08:17 -0500
commitc013b74975dab0805ef6d369b013230c4e8a660d (patch)
tree281f4327624d9b9d9700aeacda0c62ce301ee0cd /board/freescale/mpc8572ds/tlb.c
parent4e190b03aaf2309bd2e025d1187a2ca880fedc95 (diff)
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NAND: Add support for MPC8572DS board
This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns 0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file. It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to make room for the increased code size with NAND enabled. Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'board/freescale/mpc8572ds/tlb.c')
-rw-r--r--board/freescale/mpc8572ds/tlb.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/board/freescale/mpc8572ds/tlb.c b/board/freescale/mpc8572ds/tlb.c
index 1c5ed3f..8d1f646 100644
--- a/board/freescale/mpc8572ds/tlb.c
+++ b/board/freescale/mpc8572ds/tlb.c
@@ -80,6 +80,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_PHYS, CONFIG_SYS_PCIE3_IO_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_256K, 1),
+
+ /* *I*G - NAND */
+ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 7, BOOKE_PAGESZ_1M, 1),
+
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);