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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-10-15 17:47:06 +0400
committerKumar Gala <galak@kernel.crashing.org>2009-10-27 09:36:48 -0500
commit7f52ed5ef1b490da282ace3316be381a6abf96a5 (patch)
tree775e133205d0440cb47776e4b64a0442c339b1d8 /board/freescale/mpc8569mds/bcsr.h
parent48618126f78f05042dae428811809b594f747eb9 (diff)
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mpc85xx: Add eSDHC support for MPC8569E-MDS boards
eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2 (in 1-bit mode). When eSDHC is used, we should switch u-boot console to UART1, and make the proper device-tree fixups. Because of an erratum in prototype boards it is impossible to use eSDHC without disabling UART0 (which makes it quite easy to 'brick' the board by simply issung 'setenv hwconfig esdhc', and not able to interact with U-Boot anylonger). So, but default we assume that the board is a prototype, which is a most safe assumption. There is no way to determine board revision from a register, so we use hwconfig. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8569mds/bcsr.h')
-rw-r--r--board/freescale/mpc8569mds/bcsr.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/board/freescale/mpc8569mds/bcsr.h b/board/freescale/mpc8569mds/bcsr.h
index c4738d7..2ed57d8 100644
--- a/board/freescale/mpc8569mds/bcsr.h
+++ b/board/freescale/mpc8569mds/bcsr.h
@@ -33,7 +33,8 @@
#define BCSR6_UPC1_POS_EN 0x40
#define BCSR6_UPC1_ADDR_EN 0x20
#define BCSR6_UPC1_DEV2 0x10
-#define BCSR6_SD_ENABLE 0x04
+#define BCSR6_SD_CARD_1BIT 0x08
+#define BCSR6_SD_CARD_4BITS 0x04
#define BCSR6_TDM2G_EN 0x02
#define BCSR6_UCC7_RMII_EN 0x01