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authorKumar Gala <galak@kernel.crashing.org>2010-12-17 10:13:19 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:20 -0600
commit3f6f9d76415072571029b646a6aefc067a635bde (patch)
tree30c7d5452ab2e881b8d8f45a51760cf2a3898dfc /board/freescale/mpc8568mds/law.c
parent48f27919aa85c6f545d42093f389bd1d312d5744 (diff)
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powerpc/85xx: Rework MPC8568MDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8568MDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8568mds/law.c')
-rw-r--r--board/freescale/mpc8568mds/law.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/board/freescale/mpc8568mds/law.c b/board/freescale/mpc8568mds/law.c
index 3114e8a..e24b72b 100644
--- a/board/freescale/mpc8568mds/law.c
+++ b/board/freescale/mpc8568mds/law.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright 2008, 2010 Freescale Semiconductor, Inc.
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -50,10 +50,6 @@
*/
struct law_entry law_table[] = {
- SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
- SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
- SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI),
- SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1),
SET_LAW(CONFIG_SYS_SRIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
/* LBC window - maps 256M. That's SDRAM, BCSR, PIBs, and Flash */
SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),