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authorStefan Roese <sr@denx.de>2007-12-29 09:23:11 +0100
committerStefan Roese <sr@denx.de>2007-12-29 09:23:11 +0100
commitfeaa43f3a8f465cbf01ffa1b23b6b52431819a52 (patch)
tree3ee393d421c72a882d27b1de5978a2a9befce062 /board/freescale/mpc8568mds/bcsr.c
parent8697e6a19b10f514511b6a9c86de88bd108c4f8d (diff)
parente174ac34adf5d5653df12bc3cf19c52063a71269 (diff)
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Merge branch 'for-1.3.2-ver2'
Conflicts: cpu/ppc4xx/fdt.c include/configs/kilauea.h include/configs/sequoia.h Signed-off-by: Stefan Roese <sr@denx.de>
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diff --git a/board/freescale/mpc8568mds/bcsr.c b/board/freescale/mpc8568mds/bcsr.c
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+/*
+ * Copyright 2007 Freescale Semiconductor.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include "bcsr.h"
+
+void enable_8568mds_duart()
+{
+ volatile uint* duart_mux = (uint *)(CFG_CCSRBAR + 0xe0060);
+ volatile uint* devices = (uint *)(CFG_CCSRBAR + 0xe0070);
+ volatile u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ *duart_mux = 0x80000000; /* Set the mux to Duart on PMUXCR */
+ *devices = 0; /* Enable all peripheral devices */
+ bcsr[5] |= 0x01; /* Enable Duart in BCSR*/
+}
+
+void enable_8568mds_flash_write()
+{
+ volatile u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ bcsr[9] |= 0x01;
+}
+
+void disable_8568mds_flash_write()
+{
+ volatile u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ bcsr[9] &= ~(0x01);
+}
+
+void enable_8568mds_qe_mdio()
+{
+ u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ bcsr[7] |= 0x01;
+}