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authorBecky Bruce <beckyb@kernel.crashing.org>2010-12-17 17:17:59 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:19 -0600
commit7ea3871e06c421a44e7286792610dc00992070e6 (patch)
tree32d8dcd79877b18b43d5961da1db072eeece6aa0 /board/freescale/mpc8548cds/mpc8548cds.c
parent810c44274980d8bb9fa0d81d091a374adbae8309 (diff)
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MPC8xxx DDR: align informational prints
Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8548cds/mpc8548cds.c')
-rw-r--r--board/freescale/mpc8548cds/mpc8548cds.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 8ad6b22..2c45585 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -121,9 +121,9 @@ void lbc_sdram_init(void)
uint cpu_board_rev;
uint lsdmr_common;
- puts(" SDRAM: ");
-
- print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+ puts("LBC SDRAM: ");
+ print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+ "\n ");
/*
* Setup SDRAM Base and Option Registers