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authorPeter Tyser <ptyser@xes-inc.com>2010-01-17 15:38:26 -0600
committerWolfgang Denk <wd@denx.de>2010-01-17 23:06:44 +0100
commit64917ca38933d10b3763f61df7a1e58e1e127b52 (patch)
tree1f2b2e4f7160311b5c6c75110e9e6623f5dbf43c /board/freescale/mpc8544ds
parent6a45e384955262882375a2785426dc65aeb636c4 (diff)
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PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
Diffstat (limited to 'board/freescale/mpc8544ds')
-rw-r--r--board/freescale/mpc8544ds/mpc8544ds.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 35a8063..b35e02f 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -144,7 +144,7 @@ void pci_init_board(void)
pcie3_hose.region_count = 1;
#endif
printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
@@ -179,7 +179,7 @@ void pci_init_board(void)
pcie1_hose.region_count = 1;
#endif
printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
@@ -210,7 +210,7 @@ void pci_init_board(void)
pcie2_hose.region_count = 1;
#endif
printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);