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| author | Kumar Gala <galak@kernel.crashing.org> | 2009-09-19 11:20:54 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-09-24 12:04:58 -0500 |
| commit | 002741ae862c1c7e3dad89d020e392e6add1c05d (patch) | |
| tree | 74789a945930bfd66faadf7394ae84f74f2c4dd9 /board/freescale/mpc8544ds | |
| parent | f61dae7c9dc526410faec15ce352b11fc36a560b (diff) | |
| download | u-boot-imx-002741ae862c1c7e3dad89d020e392e6add1c05d.zip u-boot-imx-002741ae862c1c7e3dad89d020e392e6add1c05d.tar.gz u-boot-imx-002741ae862c1c7e3dad89d020e392e6add1c05d.tar.bz2 | |
ppc/85xx: Clean up use of LAWAR defines
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h. Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8544ds')
| -rw-r--r-- | board/freescale/mpc8544ds/law.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/mpc8544ds/law.c b/board/freescale/mpc8544ds/law.c index 317ba26..3d308c8 100644 --- a/board/freescale/mpc8544ds/law.c +++ b/board/freescale/mpc8544ds/law.c @@ -30,10 +30,10 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI), - SET_LAW(CONFIG_SYS_LBC_NONCACHE_BASE, LAWAR_SIZE_128M, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CONFIG_SYS_LBC_NONCACHE_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), + SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1), SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1), - SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2), + SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_2), SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2), /* contains both PCIE3 MEM & IO space */ SET_LAW(CONFIG_SYS_PCIE3_MEM_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_PCIE_3), |